Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Andreas Ripp"'
Publikováno v:
Journal of Computational Electronics. 15:1424-1439
We present the detailed results of the application of mathematical optimization algorithms to transistor sizing in a full-adder cell design, to obtain the maximum expected fabrication yield. The approach takes into account all the fabrication process
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::b71f17780b2248f8525c0f58224940a8
https://doi.org/10.1007/s10825-016-0878-2
https://doi.org/10.1007/s10825-016-0878-2
Publikováno v:
Microelectronics Journal. 44:321-331
Process variability are getting worse with the scaled technologies especially below 90nm, therefore for the reliable fabrication outcome, the effect of both the local and global process variability should be taken into account. In this paper, verific
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::45aefb33acd91a654b689d3db26cd9ea
https://doi.org/10.1016/j.mejo.2012.11.004
https://doi.org/10.1016/j.mejo.2012.11.004
Aging phenomena, on top of process variations along with temperature and supply voltage variations, translate into complex degradation effects on the required performance and yield of nanoscale circuits. The proposed paper focuses on the development
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::2a09797db9bf2edab52b9a05e65f294d
http://hdl.handle.net/11573/851860
http://hdl.handle.net/11573/851860
Autor:
Michael Pronath, Antonio Colaci, Andrea Roggero, Andreas Ripp, Gianluigi Boarin, Gunter Strube, Lorenzo Civardi, Carlo Roma
Publikováno v:
SBCCI
In this paper we will demonstrate the benefits of systematic circuit analysis and optimization applied at different abstraction levels of a typical analog and mixed-signal design to address market requirements and technical challenges of nanometer te
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::9439c02d3bd3c6cb03d0a7d0e35af2a0
https://doi.org/10.1145/1854153.1854165
https://doi.org/10.1145/1854153.1854165
Publikováno v:
Scopus-Elsevier
SBCCI
SBCCI
Due to increasing CMOS process variability, optimization for yield has become one of the crucial tasks in Integrated Circuit (IC) design especially in analog IC design. This variability is getting worse with the continuous scaling of device dimension
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::fe41424d94f58f8e526a76f744735bbf
http://www.scopus.com/inward/record.url?eid=2-s2.0-84870853249&partnerID=MN8TOARS
http://www.scopus.com/inward/record.url?eid=2-s2.0-84870853249&partnerID=MN8TOARS
Autor:
Andreas Rippert
Publikováno v:
CHIMIA, Vol 60, Iss 7-8 (2006)
Externí odkaz:
https://doaj.org/article/5ee062ecb2b147ff9a3706299a071ec0