Zobrazeno 1 - 10
of 38
pro vyhledávání: '"André Ivanov"'
Autor:
S. Arash Sheikholeslam, Jon López-Zorrilla, Hegoi Manzano, Saamaan Pourtavakoli, André Ivanov
Publikováno v:
ACS Omega, Vol 6, Iss 43, Pp 28561-28568 (2021)
Externí odkaz:
https://doaj.org/article/87d00cf382944d87a493b92717e7de0a
Publikováno v:
ACM Transactions on Design Automation of Electronic Systems.
Routing congestion is one of the many factors that need to be minimized during the physical design phase of large integrated circuits. In this paper, we propose a novel congestion estimation method, called MEDUSA, that consists of three parts: 1) a f
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 12:1068-1074
Aliasing is studied for delay and stuck-open faults. It is shown that, as the test sequence length is increased, the probability of aliasing for such faults tend to 2/sup -k/, where k is the number of binary memory elements in a linear compactor. The
Publikováno v:
IEEE Transactions on Computers. 42:228-234
Many results regarding the probability of aliasing for multiple-input compactors have been derived under error assumptions that are not very realistic for VLSI circuits. Recently, the value of aliasing probability has been proven to tend to 2/sup -k/
Autor:
André Ivanov, Slawomir Pilarski
Publikováno v:
Integration. 13:17-38
Built-in self-test (BIST) is emerging as one of the most promising solutions for testing large and complex integrated circuits. In BIST, high test quality is generally achieved by applying a large number of test patterns to the circuit under test. Th
Autor:
André Ivanov, Y. Wu
Publikováno v:
Microelectronics Journal. 23:205-214
The approach of checking multiple signatures has recently received attention because of the associated advantages of small aliasing, easy computation of fault coverage, shorter average test time, and increased fault diagnosability. In this paper we p
Autor:
Yervant Zorian, André Ivanov
Publikováno v:
IEEE Transactions on Computers. 41:646-653
A built-in self-test (BIST) scheme for ROMs that has very high fault coverage and very small likelihood of error escape (aliasing) is described. For test generation, the scheme uses the exhaustive test technique. For output data evaluation the scheme
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 11:16-25
Recent predictions about the aliasing behavior of linear feedback shift registers used in signature analysis with pseudorandom testing are validated experimentally. It is shown that the independent error model accurately predicts aliasing in these si
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 10:260-265
An algorithm, ALG-MK, for computing exact aliasing probabilities in signature analysis is derived from a Markov process model of signature analysis. A previous algorithm, ALG-BL, which was derived from a Boolean expressions formulation of the problem
Autor:
V.K. Agarwal, André Ivanov
Publikováno v:
FTCS
An iterative technique for computing the exact probability of aliasing for any linear feedback signature register (i.e. characterized by any feedback polynomial, for any constant probability of error, and for any test length) is proposed. The techniq