Zobrazeno 1 - 10
of 46
pro vyhledávání: '"Ando Ki"'
The plant bioelectric potential is believed to be a suitable real-time and noninvasive method that can be used to evaluate plant activities, such as the photosynthetic reaction. The amplitude of the bioelectric potential response when plants are illu
Externí odkaz:
http://arxiv.org/abs/1908.10168
Publikováno v:
In Computers and Electronics in Agriculture December 2020 179
Publikováno v:
IEIE Transactions on Smart Processing and Computing. 4:83-88
Core-A is 32-bit synthesizable processor core with a unique instruction set architecture (ISA). In this paper, the Core-A ISA is introduced with discussion of useful features and the development environment, including the software tool chain and hard
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b39e5be9e606657dcceb01ee7619106f
https://doi.org/10.5573/ieiespc.2015.4.2.083
https://doi.org/10.5573/ieiespc.2015.4.2.083
Publikováno v:
Electronics & Communications in Japan. Aug2012, Vol. 95 Issue 8, p10-16. 7p.
Publikováno v:
Journal of Systems Architecture. 48:49-57
This paper reports on the synthesis of interface between software chip model and target board in a behavioral emulation system called in-system algorithm verification engine (iSAVE). iSAVE performs in-system verification of the behavioral description
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ebf0bc58bb4a3ae833f68aad50c6c56d
https://doi.org/10.1016/s1383-7621(02)00065-6
https://doi.org/10.1016/s1383-7621(02)00065-6
Autor:
Alan E. Knowles, Ando Ki
Publikováno v:
Journal of Systems Architecture. 46:1093-1102
A prefetch method that enables stride prefetching at the secondary cache without accessing the processor's internal resources is developed and evaluated. It uses a data-range-table that enables it to detect usable strides and memory access streams wh
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d3a0729f4dfddbe1dafae76fd0d79f68
https://doi.org/10.1016/s1383-7621(00)00011-4
https://doi.org/10.1016/s1383-7621(00)00011-4
Autor:
Ando Ki
Publikováno v:
Microprocessors and Microsystems. 23:245-253
Data prefetching, which issues data fetch requests prior to actual use, is an effective technique to reduce the effects of memory access latency. In this paper, we propose an implementation of tagged data prefetching that needs no cache modification
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2ab2f79f0f3a508e5020bdb3e2fe548c
https://doi.org/10.1016/s0141-9331(99)00011-3
https://doi.org/10.1016/s0141-9331(99)00011-3
Publikováno v:
Essential Issues in SOC Design ISBN: 9781402053511
Verification of System-On-a-Chip (SoC) poses us a serious challenge as it involves not only high chip complexity but also hardware/software co-verification along with short design time-to-market. Traditional IC design verification technologies based
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::08ce3b22ba95f40ff2751335d708445d
https://doi.org/10.1007/1-4020-5352-5_7
https://doi.org/10.1007/1-4020-5352-5_7
Publikováno v:
2007 International Symposium on VLSI Design, Automation and Test (VLSI-DAT).
This paper presents a new scheme that reduces the modeling efforts of a transactor while retaining the performance of transaction-based verification for hardware/software co-emulation system. The conventional transaction-based verification requires t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ba496b1133f1cbff2312dda3eb7cccd1
https://doi.org/10.1109/vdat.2007.373208
https://doi.org/10.1109/vdat.2007.373208
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