Zobrazeno 1 - 10
of 34
pro vyhledávání: '"Anco Heringa"'
Autor:
Andries J. Scholten, Jurriaan Schmitz, Anco Heringa, Raymond J. E. Hueting, Alessandro Ferrara, Peter G. Steeneken, B. K. Boksteen
Publikováno v:
Solid-state electronics, 113, 28-34. Elsevier
In this work, a physics-based model is derived based on a linearization procedure for investigating the electrical, thermal and electro-thermal instability of power metal–oxide–semiconductor (MOS) transistors. The proposed model can be easily int
Autor:
B. K. Boksteen, Jurriaan Schmitz, Anco Heringa, Peter G. Steeneken, Raymond J. E. Hueting, Alessandro Ferrara
Publikováno v:
IEEE Transactions on Electron Devices, 62(10), 3341-3347. IEEE
In order to maximize the OFF-state breakdown voltage (BV) of semiconductor devices, the slope of the electric field in the drift extension along the current flow direction ( $ E_{x}$ field) should be zero. This is achieved using the reduced surface f
Autor:
Alessandro Ferrara, Anco Heringa, B. K. Boksteen, Jurriaan Schmitz, Raymond J. E. Hueting, Peter G. Steeneken
Publikováno v:
IEEE Transactions on Electron Devices, 62(2), 622-629. IEEE
A methodology for extracting the lateral electric field ( $\boldsymbol {E}_{\boldsymbol {x}}$ ) in the drain extension of thin silicon-on-insulator high-voltage field-plate assisted reduced surface field (RESURF) devices is detailed including its lim
Publikováno v:
IEEE Transactions on Electron Devices, 61(8), 2859-2866. IEEE
A systematic study on the effects of arbitrary parasitic charge profiles, such as trapped or fixed charge, on the 2-D potential distribution in the drain extension of reverse-biased field-plate-assisted reduced surface field (RESURF) devices is prese
Autor:
Anco Heringa, Ray Duffy
Publikováno v:
physica status solidi c. 11:130-137
Defects may arise in the semiconductor substrate and at interfaces due to the processing used to fabricate transistors and circuits. The development of low-thermal-budget processes, which is advantageous in many ways, unfortunately reduces the likeli
Autor:
A. P. van der Wel, Raymond J. E. Hueting, J. Claes, Alessandro Ferrara, Anco Heringa, Jurriaan Schmitz, Peter G. Steeneken, B. K. Boksteen
Publikováno v:
2015 IEEE 27th International Symposium on Power Semiconductor Devices & IC's (ISPSD), 165-168
STARTPAGE=165;ENDPAGE=168;TITLE=2015 IEEE 27th International Symposium on Power Semiconductor Devices & IC's (ISPSD)
STARTPAGE=165;ENDPAGE=168;TITLE=2015 IEEE 27th International Symposium on Power Semiconductor Devices & IC's (ISPSD)
In this work we present a new device: the boost transistor. The boost transistor is an LDMOS transistor that is controlled by a separate field plate boost electrode that reduces the specific on-resistance R on A. By applying a positive voltage V boos
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::5d6c44d5d667edbb8f163165c7de1d65
https://research.utwente.nl/en/publications/2e101cc8-d97b-4c1c-8f80-4d823dac94fa
https://research.utwente.nl/en/publications/2e101cc8-d97b-4c1c-8f80-4d823dac94fa
Publikováno v:
ECS Transactions. 3:19-33
Leakage currents in metal-oxide-semiconductor (MOS) devices are undesirable as they drain power supply resources in integrated circuits and systems. As MOS device dimensions scale, control of junction leakage and short channel effects (SCE) become mo
Publikováno v:
IEEE Transactions on Electron Devices. 51:2102-2108
Device simulation of the 180-, 90-, and 65-nm CMOS generations shows that in NMOSTs, the cut-off frequency f/sub T/ and the maximum oscillation frequency f/sub max/ are roughly inversely proportional to the gate length. The voltage-gain bandwidth f/s
Publikováno v:
IEEE Transactions on Electron Devices. 51:1323-1330
For the switching performance of low-voltage (LV) power MOSFETs, the gate-drain charge density (Q/sub gd/) is an important parameter. The so-called figure-of-merit, which is defined as the product of the specific on-resistance (R/sub ds,on/) and Q/su
Autor:
P. Ivo, P.H.C. Magnee, Tony Vanhoucke, Anco Heringa, Mahmoud Al-Sa'di, T. V. Dinh, D. B. M. Klaassen
Publikováno v:
2014 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM).
An SiGe heterojunction bipolar transistor having a very high open-base breakdown voltage (BV CEO ), which is close to the hard breakdown voltage (BV CBO ), is introduced. This is achieved by draining the hot holes generated from impact ionization to