Zobrazeno 1 - 10
of 13
pro vyhledávání: '"Anbu Selvam Km Mahalingam"'
Autor:
Eswar Ramanathan, Zhiguo Sun, Vijaya Rana, Vijayalakshmi Seshachalam, Anbu Selvam Km Mahalingam, Chauhan Kripa Nidhan, Joseph F. Shepard, Tingge Xu, Minrui Wang, Mary Claire Silvestre, Yang Bum Lee
Publikováno v:
2019 China Semiconductor Technology International Conference (CSTIC).
In advanced technology nodes, Multi-color back end of line self-aligned via (SAV) integration involves a stack of dielectric and metallic thin films to memorize the pattern transferred from different color lithography masks. We see intermittent so-ca
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::de9b2ad9e98e3877a46e1262eb526a5c
https://doi.org/10.1109/cstic.2019.8755634
https://doi.org/10.1109/cstic.2019.8755634
Autor:
Ashwini Chandrashekar, Jinping Liu, Bharat Krishnan, M. Gribelyuk, A. Zainuddin, Kassim Joseph K, T. J. Tang, Zhiguo Sun, J. Yang, Eswar Ramanathan, Shishir Ray, Ritesh Ray Chaudhuri, Tian Shen, Jay Mody, Huang Liu, Anbu Selvam Km Mahalingam, Kong Boon Yeap, Linjun Cao, Rinus T. P. Lee, Ryan Sporer, D. Damjanovic, N. Petrov
Publikováno v:
2018 IEEE Symposium on VLSI Technology.
Nanosecond laser-induced grain growth in Cu interconnects is demonstrated for the first time using 14nm FinFET technology. We achieved a 35% reduction in Cu interconnect resistance, which delivers a 15% improvement in RC and a gain of 2 – 5% in I D
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0dd407cc68abf63f0ac888a120bb66aa
https://doi.org/10.1109/vlsit.2018.8510651
https://doi.org/10.1109/vlsit.2018.8510651
Autor:
Chun Hui Low, Anbu Selvam Km Mahalingam, Ming He, DeNeil Park, Alycia Roux, Yue Zhou, Mert Karakoy, Daniel Fisher, Mary Claire Silvestre, Craig Child
Publikováno v:
2017 28th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC).
For metal pitches below 50nm, triple patterning (LELELE) integration is utilized in most advanced technologies to build the Cu interconnect. This integration relies on etch to shrink to the target critical dimension. As a result of high iso-dense bia
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ce8c06de8656b2d11b892a74af58948c
https://doi.org/10.1109/asmc.2017.7969189
https://doi.org/10.1109/asmc.2017.7969189
Autor:
Shafaat Ahmed, Ketan Shah, Craig Child, Stephan Grunow, Dinesh Koli, Anbu Selvam Km Mahalingam, Adam da Silva, Tien-Jen Cheng, Mukta Sharma, Teng-Yin Lin
Publikováno v:
2017 28th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC).
Electroplating for the sub-50 nm pitch back-end-of-line (BEOL) interconnect metallization has become increasingly challenging mostly because of marginal seed coverage, inadequate plating process and/or chemistry, the limitation of scaling the barrier
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::298867b129379d7d6b064f65fb42d6cc
https://doi.org/10.1109/asmc.2017.7969191
https://doi.org/10.1109/asmc.2017.7969191
Autor:
Mary Claire Silvestre, Eswar Ramanathan, Mukesh Gogna, Christopher Ordonio, Anbu Selvam Km Mahalingam, John Schaller
Publikováno v:
2016 27th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC).
A conventional back end of line (BEOL) post-lithography rework process is usually considered as a non-critical process compared to other process steps in a silicon flow in advanced technologies. This paper discusses the impact of this non-critical pr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::760bbde5f34951f426c91d3e1b50157c
https://doi.org/10.1109/asmc.2016.7491093
https://doi.org/10.1109/asmc.2016.7491093
Autor:
Anbu Selvam Km Mahalingam, San Leong Liew, Prakash Periasamy, Craig Child, Jeric Sarad, Adam da Silva
Publikováno v:
2016 27th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC).
Technology scaling necessitates interconnect structures (metal and vias) in the back end of the line (BEOL) module to sub 50nm pitch. This presents significant challenges to the conventional metallization scheme, consisting of liner, seed deposition
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5993c83a5f8ba70ff08c0ddedd79d82b
https://doi.org/10.1109/asmc.2016.7491147
https://doi.org/10.1109/asmc.2016.7491147
Autor:
Anbu Selvam Km Mahalingam, Qian Ge, J.-B. Laloë, San Leong Liew, Mary Claire Silvestre, Alain Laval, Balajee Rajagopalan, Robert F. Teagle, Eswar Ramanathan, Nobuyuki Takahashi, Sohana Khanal
Publikováno v:
2016 27th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC).
The BEOL Barrier-Seed deposition process is a key component in achieving the desired electrical and electro-migration performance while balancing the step coverage. The process also has a multifold impact on wafer yield parametric since it serves mul
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3c171f5cc5531e1dd0b7472867e52055
https://doi.org/10.1109/asmc.2016.7491165
https://doi.org/10.1109/asmc.2016.7491165
Autor:
Aleksandra Clancy, Ayman Hamouda, Ashwini Chandrasekhar, Shyam Pal, Jeff Shu, Christopher Ordonio, Jason Eugene Stephens, Chun Hui Low, Ming He, Prakash Periasamy, Mary Claire Silvestre, Anbu Selvam Km Mahalingam, Peter Welti, Craig Child, Granger Lobb, Ketan Shah
Publikováno v:
2016 IEEE International Interconnect Technology Conference / Advanced Metallization Conference (IITC/AMC).
10nm M1 local interconnect is using three-color litho-etch-litho-etch-litho-etch (LELELE) integration to enable technology scaling. This paper discusses the challenges to balance the three-color density in critical standard cell scaling, illustrates
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f7a2ece826e66bfdf116c6484b2c2ed5
https://doi.org/10.1109/iitc-amc.2016.7507642
https://doi.org/10.1109/iitc-amc.2016.7507642
Autor:
Craig Child, Prakash Periasamy, Ashwini Chandrasekhar, Shyam Pal, Chun Hui Low, Anbu Selvam Km Mahalingam, Ketan Shah, Christopher Ordonio, Peter Welti
Publikováno v:
2016 27th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC).
In advanced technology nodes, the BEOL requires advanced patterning techniques such as triple patterning (LELELE) and side wall image transfer techniques to form metal and via structures with pitches below 50nm. In this paper, we demonstrate metal cr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b2de681e559d4c68e72791f7ec32be1a
https://doi.org/10.1109/asmc.2016.7491157
https://doi.org/10.1109/asmc.2016.7491157
Autor:
Craig Child, A K M Sajjadul Islam, Prakash Periasamy, Ashwini Chandrasekhar, Anbu Selvam Km Mahalingam, Christian Witt
Publikováno v:
2016 27th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC).
In advanced technology nodes, the BEOL requires advanced patterning techniques such as triple pattering (LELELE) and side wall image transfer techniques to form metal and via structures with pitches below 50nm. This scenario has imposed increased dem
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::032be74af838bb3ade53338a5a97caee
https://doi.org/10.1109/asmc.2016.7491168
https://doi.org/10.1109/asmc.2016.7491168