Zobrazeno 1 - 5
of 5
pro vyhledávání: '"Anand Varadharajan"'
Autor:
Dirk Lefeber, Bram Vanderborght, Elias Saerens, Anand Varadharajan, Tom Verstraten, Pablo Lopez Garcia, Stein Crispel
In many robotic applications, high torque density and highly efficient actuators are required to handle the high torque motion without hampering mobility through excessive weight and footprint. Traditionally, engineers designing actuators for these t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::39741c12158554740d5ba88e6a5b0033
https://biblio.vub.ac.be/vubir/a-novel-wolfrombased-gearbox-for-robotic-actuators(d2305e1d-bebd-49b5-96e7-75a8aaf752a4).html
https://biblio.vub.ac.be/vubir/a-novel-wolfrombased-gearbox-for-robotic-actuators(d2305e1d-bebd-49b5-96e7-75a8aaf752a4).html
Autor:
Pablo Lopez Garcia, Elias Saerens, Stein Crispel, Anand Varadharajan, Dirk Lefeber, Tom Verstraten
Publikováno v:
MATEC Web of Conferences. 366:01002
Human-Centered Robotics aims to use robotic devices to improve our life. In Europe alone, around 650.000 people live with limb amputations, 40 Mio. have jobs with high of lumbar injuries, and 40 Mio. are 80+ years. Worldwide, active prostheses, exosk
Autor:
Bruce Fishbein, Mark Spaeth, William Lin, Akin Aina, Adam Hughes, Thucydides Xanthopoulos, David A. Carlson, D. Brasili, Anil Jain, V. Yalala, Rahul Mehrotra, Ethan Crain, Suresh Balasubramanian, Manan Salvi, Shi-Huang Yin, Brian Miller, Ilan Pragaspathi, Richard E. Kessler, Pragati Tiwary, Scott E. Meninger, David Lin, Bill Stysiack, Vasu Kandadi, Rob Kuhn, Dan Hartman, Tim Kiszely, Anand Varadharajan, Joe Vulih, Mandar Kulkarni
Publikováno v:
ISSCC
This paper describes our third generation multicore processor that exhibits a high level of integration [1]. The current design doubles the number of cores, triples the frequency and more than quadruples total memory bandwidth over [1]. It contains 7
Autor:
K. Kodandapani, T. Kiszely, D. Brasili, V. Yalala, David A. Carlson, Thucydides Xanthopoulos, A. Jain, Anand Varadharajan, A. Hughes
Publikováno v:
ISSCC
A multi-core RISC processor is integrated with a number of security engines and network function accelerators creating a high-performance power-efficient SoC. It contains 180M transistors, dissipates 25W at 600MHz and is fabricated in a 1.2V 0.13mum
Autor:
Anand Varadharajan, Pl, Garcia, STEIN CRISPEL, Bram Vanderborght, Dirk Lefeber, Tom Verstraten
Publikováno v:
Vrije Universiteit Brussel
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::2065618e32edd0fb97021841b470927e
https://researchportal.vub.be/en/publications/d273c33f-11a3-4490-aa0d-5c96c03aad09
https://researchportal.vub.be/en/publications/d273c33f-11a3-4490-aa0d-5c96c03aad09