Zobrazeno 1 - 10
of 6 439
pro vyhledávání: '"Analogue electronics"'
Publikováno v:
TEM Journal. 8(1):284-289
Externí odkaz:
https://www.ceeol.com/search/article-detail?id=746751
Publikováno v:
IEEE Transactions on NanoBioscience. 21:511-519
Currently, DNA strand displacement is often used to build neural networks or solve logical problems. While there are few studies on the use of DNA strand displacement to solve the higher order equations. In this paper, the catalysis, degradation, ann
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::5637514ddeb0c87c54fbcd296981254e
https://doi.org/10.1109/tnb.2021.3128393
https://doi.org/10.1109/tnb.2021.3128393
Autor:
Borivoje Nikolic, Rajeev Jain, Rishubh Khurana, Zhaokai Liu, Keertana Settaluri, Arash Mirhaj
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 41:2794-2807
Analog and mixed-signal (AMS) blocks are often a crucial and time-consuming part of System-on-Chip (SoC) design, primarily due to manual circuit and layout iterations. Existing automated solutions for selecting circuit parameters for a given target s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d9bc8104d6432c30b9620205aad08920
https://doi.org/10.1109/tcad.2021.3120547
https://doi.org/10.1109/tcad.2021.3120547
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 41:2560-2572
A spectrum of emerging applications including edge artificial intelligence advocate the precompute-and-search scheme with embedded small-size content addressable memory (CAM) for its hardware efficiency instead of repetitive arithmetic operations. Ho
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a760cf906a83690882904ffd4a94aba2
https://doi.org/10.1109/tcad.2021.3112135
https://doi.org/10.1109/tcad.2021.3112135
Publikováno v:
Tsinghua Science and Technology. 27:512-525
Building a post-layout simulation performance model is essential in closing the loop of analog circuits, but it is a challenging task because of the high-dimensional space and expensive simulation cost. To facilitate efficient modeling, this paper pr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::aed0667194683e80be9430370aea1b57
https://doi.org/10.26599/tst.2021.9010042
https://doi.org/10.26599/tst.2021.9010042
Publikováno v:
IEEE Journal of Emerging and Selected Topics in Power Electronics. 10:1007-1016
A novel driving circuit for a current doubler synchronous rectifier to inductive power transfer (IPT) applications is proposed in this paper using only auxiliary windings in the existent rectifier output filter inductors to drive the active switches.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0d6d9019300753886f4eda854cd55967
https://doi.org/10.1109/jestpe.2021.3105041
https://doi.org/10.1109/jestpe.2021.3105041
Publikováno v:
IEEE Transactions on Power Electronics. 37:313-321
Traditional power factor correction (PFC) converters usually employ a large electrolytic capacitor to ensure a stiff output voltage. However, the electrolytic capacitor is not expected in terms of the reliability and the size of the system. This arti
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c1a82e65dcfa3f2ceacb806adb557727
https://doi.org/10.1109/tpel.2021.3099218
https://doi.org/10.1109/tpel.2021.3099218
Autor:
Nandakumar Nambath, Ria Rashid
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 69:199-203
Analog circuit design can be formulated as a non-linear constrained optimisation problem that can be solved using any suitable optimisation algorithms. Different optimisation techniques have been reported to reduce the design time of analog circuits.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e66fd6b79ca7a9336672157fccb4a710
https://doi.org/10.1109/tcsii.2021.3089937
https://doi.org/10.1109/tcsii.2021.3089937
Autor:
Vaibhav Venugopal Rao, Ioannis Savidis
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 29:2013-2026
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::91e2ccbb7d64c2dd93bda2df40eefda6
https://doi.org/10.1109/tvlsi.2021.3109062
https://doi.org/10.1109/tvlsi.2021.3109062
Autor:
Qiu, Junjun, Sun, Zheng, Liu, Bangan, Wang, Wenqian, XU, Dingxin, Xu, Dingxin, HERDIAN, HANS, Herdian, Hans, HUANG, Hongye, Huang, Hongye, Zhang, Yuncheng, Wang, Yun, Pang, Jian, Jian, Pang, Liu, Hanli, Nohara (Miyahara), Masaya, Shirane, Atsushi, Okada, Kenichi
Publikováno v:
IEEE Journal of Solid-State Circuits. 56(No. 12):3741-3755
In this article, a mixed-signal, 32-kHz reference-based 2.4-GHz fractional-N over-sampling phase-locked loop (OSPLL) is proposed. Different from the conventional 1x sampling PLL, which only uses zero-crossing timing information of the reference signa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::f7709b0fd039b77440ddec3fb019dde9
http://t2r2.star.titech.ac.jp/cgi-bin/publicationinfo.cgi?q_publication_content_number=CTT100879342
http://t2r2.star.titech.ac.jp/cgi-bin/publicationinfo.cgi?q_publication_content_number=CTT100879342