Zobrazeno 1 - 9
of 9
pro vyhledávání: '"Amir M. Hajisadeghi"'
Publikováno v:
2022 25th Euromicro Conference on Digital System Design (DSD).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ad07b03ae8408eefecedc298937cbf27
https://doi.org/10.1109/dsd57027.2022.00014
https://doi.org/10.1109/dsd57027.2022.00014
Publikováno v:
2022 30th International Conference on Electrical Engineering (ICEE).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::da65b0613de46e78595803f3dc1ff751
https://doi.org/10.1109/icee55646.2022.9827356
https://doi.org/10.1109/icee55646.2022.9827356
Autor:
Amir M. Hajisadeghi, Hamid R. Zarandi
Publikováno v:
Microprocessors and Microsystems. 85:104282
The effects of soft error in combinational logics are challenged by decreasing the feature size of transistors in nanoscale technologies. Moreover, the single event transients (SETs) caused by particle strikes, manifesting multiple event transients (
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::eb44ed5de4a9f3e29e5f7c8da34ef190
https://doi.org/10.1016/j.micpro.2021.104282
https://doi.org/10.1016/j.micpro.2021.104282
Publikováno v:
EDCC
Fault tree analysis is one of the most widely used methods in reliability calculation and failure probability analysis. Although fault tree analysis is a popular method, its simulation is time-consuming. Therefore, speeding up fault tree simulations
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6a8049f189a779c886ba5c3f7e495014
https://doi.org/10.1109/edcc.2019.00019
https://doi.org/10.1109/edcc.2019.00019
Publikováno v:
2019 27th Iranian Conference on Electrical Engineering (ICEE).
TAMPER presents a novel write-energy-aware driver circuit to decrease Write Error Rate (WER). Complementary metal-oxide-semiconductor, abbreviated as CMOS are vulnerable to serious shortage in designing parameters such as leakage power, scalability,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7b500d54473f9b6e554abb8227c7ae9c
https://doi.org/10.1109/iraniancee.2019.8786621
https://doi.org/10.1109/iraniancee.2019.8786621
Publikováno v:
Microprocessors and Microsystems. 73:102963
In this paper, a data sensitive write circuit is presented to decrease the Write attempt error in STT-RAM memories. CMOS technology presents a myriad of challenges to system designers in the form of soft error reliability, volatility, power consumpti
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::971dc712d5eae4effa3a4795051f69e8
https://doi.org/10.1016/j.micpro.2019.102963
https://doi.org/10.1016/j.micpro.2019.102963
Publikováno v:
DSD
By decreasing transistors feature size in nanoscale technology, the effect of soft error on combinational circuits has become a challenging problem as the particle strikes may lead to not only single event transients (SETs) but also multiple event tr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::77a726857b2b9c338d039191e6970d1a
https://doi.org/10.1109/dsd.2018.00052
https://doi.org/10.1109/dsd.2018.00052
Publikováno v:
DSD
To overcome CMOS challenges including leakage power, volatility, scalability, and soft error vulnerability, Spin Transfer Torque Random Access Memory (STT-RAM) as a non-volatile memory has been utilized. Write error occurring because of variation in
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e5818d02d11064fb2d1c823aa4b38348
https://doi.org/10.1109/dsd.2018.00044
https://doi.org/10.1109/dsd.2018.00044
Publikováno v:
IOLTS
Although RRAM as an emerging non-volatile memory has solved many dr awbacks of conventional memor ies, it has deficiencies needed to be maintained. The objective of this paper is to suppress the soft er ror susceptibility of CMOSbased peripheral read
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7d13111fa74fb0a35ca84e9b63c3c7f2
https://doi.org/10.1109/iolts.2018.8474076
https://doi.org/10.1109/iolts.2018.8474076