Zobrazeno 1 - 10
of 13
pro vyhledávání: '"Amin Firoozshahian"'
Autor:
Kim Hazelwood, Hsien-Hsin S. Lee, Bill Jia, Liu Ke, David Brooks, Martin Schatz, Maxim Naumov, Xuan Zhang, Benjamin Youngjae Cho, Carole-Jean Wu, Bert Maher, Amin Firoozshahian, Meng Li, Mark Hempstead, Utku Diril, Brandon Reagen, Mikhail Smelyanskiy, Vikas Chandra, Xiaodong Wang, Udit Gupta, Dheevatsa Mudigere
Publikováno v:
ISCA
Personalized recommendation systems leverage deep learning models and account for the majority of data center AI cycles. Their performance is dominated by memory-bound sparse embedding operations with unique irregular memory access patterns that pose
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::421f7b2188846753693aa1f8fa12cf0f
Publikováno v:
SIGCOMM
The trend towards simple datacenter network fabric strips most network functionality, including load balancing, out of the network core and pushes it to the edge. This slows reaction to microbursts, the main culprit of packet loss in datacenters. We
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1582c4a86e422afcf1985bc289fda02b
https://doi.org/10.1145/3098822.3098839
https://doi.org/10.1145/3098822.3098839
Publikováno v:
ASPLOS
Transactional memory represents an attractive conceptual model for programming concurrent applications. Unfortunately, high transaction abort rates can cause significant performance degradation. Conventional transactional memory realizations not only
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::564a6ce43c9565141776f27577bb9a79
https://doi.org/10.1145/2644865.2541952
https://doi.org/10.1145/2644865.2541952
Publikováno v:
ASPLOS
Programming language and operating system support for efficient concurrency-safe access to shared data is a key concern for the effective use of multi-core processors. Most research has focused on the software model of multiple threads accessing this
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::7510a2c5d0057811df510bfd3fd5e999
https://doi.org/10.1145/2248487.2151007
https://doi.org/10.1145/2248487.2151007
Autor:
Omid Azizi, Mark Horowitz, Megan Wachs, Ofer Shacham, Kyle Kelley, John P. Stevenson, Zain Asgar, Wajahat Qadeer, Benjamin C. Lee, Stephen Richardson, Alex Solomatnikov, Amin Firoozshahian
Publikováno v:
IEEE Micro. 30:9-24
Because of technology scaling, power dissipation is today's major performance limiter. Moreover, the traditional way to achieve power efficiency, application-specific designs, is prohibitively expensive. These power and cost issues necessitate rethin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::99fcf7cdbcc343c145045f5bfd7befc2
https://doi.org/10.1109/mm.2010.81
https://doi.org/10.1109/mm.2010.81
Autor:
Amin Firoozshahian, Alex Solomatnikov, Hideho Arakida, Christos Kozyrakis, Mark Horowitz, Jacob Leverich
Publikováno v:
ACM Transactions on Architecture and Code Optimization. 5:1-30
There are two competing models for the on-chip memory in Chip Multiprocessor (CMP) systems: hardware-managed coherent caches and software-managed streaming memory . This paper performs a direct comparison of the two models under the same set of assum
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::be6aca3b111df9370e1131bc782918b3
https://doi.org/10.1145/1455650.1455651
https://doi.org/10.1145/1455650.1455651
Publikováno v:
HotNets
The trend towards simple data center network fabric strips most network functionality, including load balancing capabilities, out of the network core and pushes them to the edge. We investigate a different direction of incorporating minimal load bala
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d98e81e0e64fa79ecd16778d0e9dc0c9
https://doi.org/10.1145/2834050.2834107
https://doi.org/10.1145/2834050.2834107
Publikováno v:
ICS
Sparse matrix-vector multiply (SpMV) is a critical task in the inner loop of modern iterative linear system solvers and exhibits very little data reuse. This low reuse means that its performance is bounded by main-memory bandwidth. Moreover, the rand
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bb1e93cef66301ca92f9413af52d2f4a
https://doi.org/10.1145/2304576.2304603
https://doi.org/10.1145/2304576.2304603
Autor:
Mark Horowitz, Alex Solomatnikov, Stephen Richardson, Megan Wachs, Zain Asgar, Wajahat Qadeer, Amin Firoozshahian, Ofer Shacham
Publikováno v:
MICRO
Building hardware prototypes for computer architecture research is challenging. Unfortunately, development of the required software tools (compilers, debuggers, runtime) is even more challenging, which means these systems rarely run real applications
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3e4cfc83ee83217c4de92e4528fa584a
https://doi.org/10.1145/1669112.1669159
https://doi.org/10.1145/1669112.1669159
Autor:
Amin Firoozshahian, Ofer Shacham, Alex Solomatnikov, Mark Horowitz, Stephen Richardson, Zain Asgar, Christos Kozyrakis
Publikováno v:
ISCA
As CPU cores become building blocks, we see a great expansion in the types of on-chip memory systems proposed for CMPs. Unfortunately, designing the cache and protocol controllers to support these memory systems is complex, and their concurrency and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e8018e5b4039783e5ceed845e612d7f1
https://doi.org/10.1145/1555754.1555805
https://doi.org/10.1145/1555754.1555805