Zobrazeno 1 - 10
of 13
pro vyhledávání: '"Ameya D. Patil"'
Publikováno v:
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, Vol 5, Iss 1, Pp 10-18 (2019)
The energy and delay reductions from CMOS scaling have stagnated, motivating the search for a CMOS replacement. Spintronic devices are one of the promising beyond-CMOS alternatives. However, they exhibit high switching error rates of 1% or more when
Externí odkaz:
https://doaj.org/article/c080bf36177b4f93bd66c9e90fc72628
Publikováno v:
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, Vol 5, Iss 1, Pp 34-42 (2019)
Computational scaling beyond silicon electronics based on Moore's law requires the adoption of alternate state variables such as electronic spin. Multiple research efforts are underway exploring both Boolean and non-Boolean design space using spin de
Externí odkaz:
https://doaj.org/article/9cea1abd162741b38021e92ba4cbb97b
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 67:1627-1639
In-memory architectures, in particular, the deep in-memory architecture (DIMA) has emerged as an attractive alternative to the traditional von Neumann (digital) architecture for realizing energy and latency-efficient machine learning systems in silic
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::28d41995268d7acca50f8d7f68253042
https://doi.org/10.1109/tcsi.2019.2960841
https://doi.org/10.1109/tcsi.2019.2960841
Publikováno v:
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, Vol 5, Iss 1, Pp 10-18 (2019)
The energy and delay reductions from CMOS scaling have stagnated, motivating the search for a CMOS replacement. Spintronic devices are one of the promising beyond-CMOS alternatives. However, they exhibit high switching error rates of 1% or more when
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::c9c89291ca55e3c81a62156978901b60
https://doi.org/10.1109/jxcdc.2019.2909912
https://doi.org/10.1109/jxcdc.2019.2909912
Publikováno v:
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, Vol 5, Iss 1, Pp 34-42 (2019)
Computational scaling beyond silicon electronics based on Moore’s law requires the adoption of alternate state variables such as electronic spin. Multiple research efforts are underway exploring both Boolean and non-Boolean design space using spin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::bf72d95ec637adf984d5a0fdd2ab097a
https://ieeexplore.ieee.org/document/8631185/
https://ieeexplore.ieee.org/document/8631185/
Publikováno v:
ICCAD
Crossbar-based in-memory architectures have emerged as an attractive platform for energy-efficient realization of deep neural networks (DNNs). A key challenge in such architectures is achieving accurate and efficient writes due to the presence of bit
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2a4a89a45507acdac0682938933c6777
https://doi.org/10.1145/3400302.3415642
https://doi.org/10.1145/3400302.3415642
Publikováno v:
IEEE Journal of Solid-State Circuits. 53:642-655
A multi-functional in-memory inference processor integrated circuit (IC) in a 65-nm CMOS process is presented. The prototype employs a deep in-memory architecture (DIMA), which enhances both energy efficiency and throughput over conventional digital
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::87cbe6823b47cee453c826009c066b98
https://doi.org/10.1109/jssc.2017.2782087
https://doi.org/10.1109/jssc.2017.2782087
Publikováno v:
ISCAS
This paper presents an MRAM-based deep in-memory architecture (MRAM-DIMA) to efficiently implement multi-bit matrix vector multiplication for deep neural networks using a standard MRAM bitcell array. The MRAM-DIMA achieves an 4.5 × and 70× lower en
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2b05eb1b2b99e6703d9f2284fe438ad7
https://doi.org/10.1109/iscas.2019.8702206
https://doi.org/10.1109/iscas.2019.8702206
Publikováno v:
ISCAS
With diminishing energy and delay benefits via CMOS scaling, there is much interest in exploring the use of alternative state variables such as electronic spin. Multiple research efforts are underway exploring both Boolean and non-Boolean design spac
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6364c9557d5753848391bfeeb1429c65
https://doi.org/10.1109/iscas.2019.8702648
https://doi.org/10.1109/iscas.2019.8702648
Autor:
Lav R. Varshney, Jan M. Rabaey, Naresh R. Shanbhag, Ian A. Young, Larry Pileggi, Sasikanth Manipatruni, Eric Pop, Ameya D. Patil, Jeffrey A. Weldon, Dmitri E. Nikonov, Subhasish Mitra, H.-S. Philip Wong
Publikováno v:
DAC
Emerging applications require computing platforms to extract task-relevant information from increasingly large amounts of data. These requirements place stringent constraints on energy efficiency, throughput, latency, and for certain data types, secu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2b8a1880a43d7f361063f5b969a09c45
https://doi.org/10.1145/3061639.3072943
https://doi.org/10.1145/3061639.3072943