Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Allan H. Dansky"'
Autor:
Patrick M. Williams, Allan H. Dansky, T. J. McPherson, Timothy G. McNamara, David A. Webber, Dale Eugene Hoffman, Michael Alexander Bowen, Robert M. Averill, Gregory A. Northrop, Howard H. Smith, L. Sigal, S. A. McCabe, M. Mayo, Peter J. Camporese, R. F. Hatch, K. G. Barkley Iii
Publikováno v:
IBM Journal of Research and Development. 43:681-706
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8d7400b713ad2447735621ce0091581b
https://doi.org/10.1147/rd.435.0681
https://doi.org/10.1147/rd.435.0681
Autor:
George A. Katopis, David A. Webber, Allan H. Dansky, Alina Deutsch, Wiren D. Becker, Phillip J. Restle, Paul W. Coteus, George Anthony Sai-Halasz, C.W. Surovic, Gerard V. Kopcsay, Howard H. Smith
Publikováno v:
IEEE Transactions on Advanced Packaging. 22:292-308
An extensive study of crosstalk simulation issues for on-chip interconnections was performed for representative six-layer Al(Cu) structures. Guidelines are given for the range of conditions when R(f)L(f)C versus RLC versus RC circuit representations
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ef1579c69d4cf2175c151edc28193478
https://doi.org/10.1109/6040.784477
https://doi.org/10.1109/6040.784477
Publikováno v:
Electrical Performance of Electronic Packaging.
A methodology based on closed form expressions is applied to predict noise and timing impact due U) line to line coupling. Statistical results for a S/3W microprocessor is shown for over 20,000 nets. The trends in CMOS chip design have all been conve
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::868b11f75bdcc83b3b9953bfa2b748ee
https://doi.org/10.1109/epep.1996.564770
https://doi.org/10.1109/epep.1996.564770
Autor:
Paul W. Coteus, George Anthony Sai-Halasz, David A. Webber, C.W. Surovic, G.V. Kopcsay, George A. Katopis, Howard H. Smith, Allan H. Dansky, Alina Deutsch, Wiren D. Becker
Publikováno v:
IEEE 7th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.98TH8370).
An extensive study of crosstalk simulation issues for on-chip interconnections was performed for representative six-layer Al(Cu) structures. Guidelines are given for the range of conditions when R(f)L(f)C vs. RLC vs. RC representations are valid. Exa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5bc80c0b66b817ee01d1590a20e8ef85
https://doi.org/10.1109/epep.1998.733744
https://doi.org/10.1109/epep.1998.733744
Publikováno v:
1997 Proceedings 47th Electronic Components and Technology Conference.
A methodology based on closed form expressions and 3D capacitance extraction is used to predict noise and timing impact due to line to line coupling. In this paper, details of the methodology described include the quantification of closed form expres
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::675fb800d926579eedea985860b3934f
https://doi.org/10.1109/ectc.1997.606264
https://doi.org/10.1109/ectc.1997.606264
Akademický článek
Tento výsledek nelze pro nepřihlášené uživatele zobrazit.
K zobrazení výsledku je třeba se přihlásit.
K zobrazení výsledku je třeba se přihlásit.