Zobrazeno 1 - 10
of 260
pro vyhledávání: '"Alex Kondratyev"'
Publikováno v:
ACM Transactions on Design Automation of Electronic Systems. 15:1-34
Hardware synthesis is the process by which system-level, Register Transfer (RT)-level, or behavioral descriptions can be turned into real implementations, in terms of logic gates. Scheduling is one of the most time-consuming steps in the overall desi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::dd6dbf36b3a35f4116b8414e4b940705
https://doi.org/10.1145/1698759.1698762
https://doi.org/10.1145/1698759.1698762
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 24:1406-1419
Noise affects circuit operation by varying circuit delays and causing latches to capture incorrect values. Conventional noise analysis techniques can detect some of such noise faults, but accurate analysis requires a careful examination of timing and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::974f8ee7d3a6aa226824b98242861642
https://doi.org/10.1109/tcad.2005.850829
https://doi.org/10.1109/tcad.2005.850829
Autor:
Gianpiero Cabodi, Stefano Quer, Sergio Nocco, Yosinori Watanabe, Alex Kondratyev, Luciano Lavagno
Publikováno v:
International Journal on Software Tools for Technology Transfer. 7:102-117
Hardware scheduling is a well-known and well-studied problem. This paper defines a new SAT-based formulation of automata-based scheduling and proposes for the first time a completely new resolution algorithm based on SAT solvers and bounded model che
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::48f70939b85a7a83d9fc48a209f35488
https://doi.org/10.1007/s10009-004-0170-9
https://doi.org/10.1007/s10009-004-0170-9
Publikováno v:
The International Journal of Advanced Manufacturing Technology. 14:750-759
Unfoldings of Petri nets (PN) provide a method for the analysis of concurrent systems without restoring the state space of a system. This allows one to overcome the “state explosion” problem. Many properties of the initial PN (boundedness, safety
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::377a2ed875f3175be0f11de994785bb3
https://doi.org/10.1007/bf01438227
https://doi.org/10.1007/bf01438227
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 17:749-771
This paper develops a theoretical framework for the hazard-free gate-level implementation of speed-independent circuits specified by event-based models, such as signal transition graphs (for processes with AND causality and input choice) or their ext
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8e4792a4a23363fc559032b54f513213
https://doi.org/10.1109/43.720313
https://doi.org/10.1109/43.720313
Publikováno v:
Formal Methods in System Design. 12:5-38
This paper suggests a way for Petri Net analysis by checking the ordering relations between places and transitions. The method is based on unfolding the original net into an equivalent acyclic description. We improved on the previously known cutoff c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3de784c1dd7ab16070dbbc9da954a446
https://doi.org/10.1023/a:1008669013857
https://doi.org/10.1023/a:1008669013857
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 17:1184-1199
Asynchronous circuits operate correctly only under timing assumptions. Hence testing those circuits for delay faults is crucial. Previous work has shown that full-scan delay-fault testing of asynchronous circuits is feasible. In this work, we tackle
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5f77ab6b62d74831bc0ddaf17496f4fd
https://doi.org/10.1109/43.736191
https://doi.org/10.1109/43.736191
Autor:
Alexandre Yakovlev, Alex Kondratyev, Michael Kishinevsky, Luciano Lavagno, Marta Pietkiewicz-Koutny
Publikováno v:
Scopus-Elsevier
Asynchronous circuits behave like concurrent programs implemented in hardware logic. The processes in such circuits are synchronised in accordance with the dynamic logical and causal conditions between switching events. The classical paradigm, easily
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::b368143dfca2f5bbcc689887b5df2f25
https://doi.org/10.1007/bf00122082
https://doi.org/10.1007/bf00122082