Zobrazeno 1 - 10
of 16
pro vyhledávání: '"Alejandro Serrano-Cases"'
Autor:
José Isaza-González, Alejandro Serrano-Cases, Felipe Restrepo-Calle, Sergio Cuenca-Asensi, Antonio Martínez-Álvarez
Publikováno v:
Revista de I + D Tecnológico, Vol 13, Iss 1, Pp 5-14 (2017)
Este artículo presenta una herramienta de inyección de fallos y la metodología para la realización de campañas de inyección de Single-Event-Upsets (SEUs) en microprocesadores Commercial-off-the-shelf (COTS). Este método utiliza las ventajas qu
Externí odkaz:
https://doaj.org/article/e6363de25579401497d06314ac7f75b4
Autor:
ALMUDENA LINDOSO, Alejandro Serrano Cases, Antonio Martínez-Álvarez, Sergio Cuenca-Asensi, Luis Entrena, Yolanda Morilla, M. Peña-Fernandez, PEDRO MARTÍN-HOLGADO
Publikováno v:
IEEE Transactions on Nuclear Science. 69:1574-1581
This work presents the evaluation of a new dual-core lockstep hybrid approach aimed to improve the fault tolerance in microprocessors. Our approach takes advantage of modern multicore processor resources to combine software-based lockstep with a cust
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::87c446ecd820c4110e523ede63849f13
https://doi.org/10.1109/tns.2022.3149867
https://doi.org/10.1109/tns.2022.3149867
Autor:
Alexander Aponte-Moreno, Alejandro Serrano Cases, Antonio Martínez-Álvarez, José Iván Isaza González, Sergio Cuenca-Asensi, Felipe Restrepo-Calle
Publikováno v:
RUA. Repositorio Institucional de la Universidad de Alicante
Universidad de Alicante (UA)
Universidad de Alicante (UA)
Statistical fault injection is widely used to estimate the reliability of mission-critical microprocessor-based systems when exposed to radiation and to evaluate the performance of fault mitigation strategies. However, further research is needed to g
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::af8f9d23847c865f18142ce2b08c7ba5
https://hdl.handle.net/10045/129390
https://hdl.handle.net/10045/129390
Publikováno v:
LATS
Statistical fault injection is a widely used methodology to early evaluation of soft error reliability of microprocessor based systems. Due to the increasing complexity of the software and hardware stack, the simulation of faults on modern processors
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4f6ad4dcc731fe3271ba21d97e9b7934
https://doi.org/10.1109/lats49555.2020.9093688
https://doi.org/10.1109/lats49555.2020.9093688
Autor:
Felipe Restrepo-Calle, Sergio Cuenca-Asensi, Alejandro Serrano-Cases, Alexander Aponte-Moreno, Antonio Martínez-Álvarez, Jose Isaza-Gonzalez
Publikováno v:
LATS
Early reliability evaluations of a microprocessor-based system can be achieved by means of fault injection tools based on simulation. This is a widely used method to validate the effectiveness of fault mitigation strategies, and also to assess the re
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::440a02169bffc9aca7797c1e5f52f6e6
https://doi.org/10.1109/lats49555.2020.9093668
https://doi.org/10.1109/lats49555.2020.9093668
Autor:
Felipe Restrepo-Calle, Sergio Cuenca-Asensi, Alejandro Serrano-Cases, Antonio Martínez-Álvarez
Publikováno v:
RUA. Repositorio Institucional de la Universidad de Alicante
Universidad de Alicante (UA)
Universidad de Alicante (UA)
This article presents a software protection technique against radiation-induced faults which is based on a multi-threaded strategy. Data triplication and instructions flow duplication or triplication techniques are used to improve system reliability
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::6ebd3006db6493a02dfd3d6cef63280d
https://hdl.handle.net/10045/105452
https://hdl.handle.net/10045/105452
Autor:
Fernanda Lima Kastensmidt, Mayler G. A. Martins, Sergio Cuenca-Asensi, Iuri Albandes, Antonio Martínez-Álvarez, Alejandro Serrano-Cases
Publikováno v:
Microelectronics Reliability. :898-902
Approximate Triple Modular Redundancy (ATMR), which is the implementation of TMR with approximate versions of the target circuit, has emerged in recent years as an alternative to partial hardware replication where designers can explore reduced area o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::520940227c4bb8a10b5624b370f7f097
https://doi.org/10.1016/j.microrel.2018.07.115
https://doi.org/10.1016/j.microrel.2018.07.115
Autor:
Almudena Lindoso, Alejandro Serrano-Cases, Mario Garcia-Valderas, Luis Entrena, Antonio Martínez-Álvarez, Sergio Cuenca-Asensi, M. Pena-Fernandez
Publikováno v:
e-Archivo. Repositorio Institucional de la Universidad Carlos III de Madrid
Universitat Autònoma de Barcelona
Universitat Autònoma de Barcelona
This work presents a new Dual-Core LockStep approach to enhance fault tolerance in microprocessors. The proposed technique is based on the combination of software-based data checking and trace-based control-flow checking through an external hardware
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::51de1ec15edd22ef723ff3650d1f3bd9
https://hdl.handle.net/10045/101318
https://hdl.handle.net/10045/101318
Autor:
Antonio Martínez-Álvarez, Sergio Cuenca-Asensi, Alejandro Serrano-Cases, Felipe Restrepo-Calle
Publikováno v:
LATS
This paper presents a technique to mitigate faults induced by radiation in standalone embedded systems based on multi-core processors. To achieve this goal, the well known Modular Redundancy technique has been extended to take advantage of several in
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::44c2b8cd43fbb74d2f04b6f503eb5f8a
https://doi.org/10.1109/latw.2019.8704614
https://doi.org/10.1109/latw.2019.8704614
Autor:
Alejandro Serrano-Cases, Antonio Martínez-Álvarez, Leonardo Reyneri, Yolanda Morilla, Sergio Cuenca-Asensi
Publikováno v:
idUS. Depósito de Investigación de la Universidad de Sevilla
instname
Electronics
Volume 8
Issue 6
RUA. Repositorio Institucional de la Universidad de Alicante
Universidad de Alicante (UA)
Electronics, Vol 8, Iss 6, p 653 (2019)
Digital.CSIC. Repositorio Institucional del CSIC
instname
Electronics
Volume 8
Issue 6
RUA. Repositorio Institucional de la Universidad de Alicante
Universidad de Alicante (UA)
Electronics, Vol 8, Iss 6, p 653 (2019)
Digital.CSIC. Repositorio Institucional del CSIC
A high-level C++ hardening library is designed for the protection of critical software against the harmful effects of radiation environments that can damage systems. A mathematical and empirical model to predict system behavior in the presence of rad
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e7c3ecf118ad977d76c380007d8f21f1