Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Albert Magyar"'
Autor:
Krste Asanovic, John Koenig, Sanjit A. Seshia, David Biancolin, Albert Magyar, Jonathan Bachrach
Publikováno v:
ICCAD
We present Golden Gate, an FPGA-based simulation tool that decouples the timing of an FPGA host platform from that of the target RTL design. In contrast to previous work in static time-multiplexing of FPGA resources, Golden Gate employs the Latency-I
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::f22f606f5baca37ff1da1e47c8484a8d
https://escholarship.org/uc/item/4zs731zk
https://escholarship.org/uc/item/4zs731zk
Autor:
Krste Asanovic, Borivoje Nikolic, Alon Amid, David Biancolin, Sagar Karandikar, Albert Magyar, Jonathan Bachrach
Publikováno v:
IEEE Micro. 41:58-66
Given the complexity of modern systems-on-chip, hardware-assisted verification is an integral part of the chip-design process. However, chip designers often need to choose between richly featured but expensive emulation platforms or faster, cheaper,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::86a06a8ecc6676f7fafe1968c5598ce1
https://doi.org/10.1109/mm.2021.3085537
https://doi.org/10.1109/mm.2021.3085537
Autor:
Harrison Liew, Yakun Sophia Shao, Colin Schmidt, Abraham Gonzalez, Krste Asanovic, Albert Magyar, Borivoje Nikolic, Alon Amid, Sagar Karandikar, Nathan Pemberton, Albert Ou, David Biancolin, Paul Rigge, Daniel Grubb, John Wright, Howard Mao, Jerry Zhao
Publikováno v:
IEEE Micro. 40:10-21
Continued improvement in computing efficiency requires functional specialization of hardware designs. Agile hardware design methodologies have been proposed to alleviate the increased design costs of custom silicon architectures, but their practice t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::662af2523e1e78eed40673bb97ef0a46
https://doi.org/10.1109/mm.2020.2996616
https://doi.org/10.1109/mm.2020.2996616
A 6–140-nW 11 Hz–8.2-kHz DVFS RISC-V Microprocessor Using Scalable Dynamic Leakage-Suppression Logic
Autor:
Ningxi Liu, Sumanth Kamineni, Jacob Breiholz, Benton H. Calhoun, Daniel S. Truesdell, Albert Magyar
Publikováno v:
IEEE Solid-State Circuits Letters. 2:57-60
This letter presents an RISC-V microprocessor implemented using a proposed scalable dynamic leakage suppression (SDLS) logic style. Together with a custom adaptive clock generator and voltage scaling controller, the SDLS RISC-V microprocessor realize
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fcbccdae3bfdd9d271e10602282e4e02
https://doi.org/10.1109/lssc.2019.2938897
https://doi.org/10.1109/lssc.2019.2938897
Autor:
Alon Amid, John Wright, Nathan Pemberton, Jonathan Bachrach, Albert Magyar, Harrison Liew, Jerry Zhao, Sophia Shao, Sagar Karandikar, Colin Schmidt, Abraham Gonzalez, Paul Rigge, Krste Asanovic, Albert Ou, Borivoje Nikolic, Daniel Grubb, David Biancolin, Howard Mao
Publikováno v:
DAC
Continued improvement in computing efficiency requires functional specialization of hardware designs. We present an agile design flow for custom SoCs using the Chipyard framework, an integrated SoC research and implementation environment for custom s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a348edc4b9cfbaa711ebaa1fcfa05965
https://doi.org/10.1109/dac18072.2020.9218756
https://doi.org/10.1109/dac18072.2020.9218756
Autor:
Adam Izraelevitz, Jack Koenig, Patrick Li, Richard Lin, Angie Wang, Albert Magyar, Donggyu Kim, Colin Schmidt, Chick Markley, Jim Lawson, Jonathan Bachrach
Publikováno v:
2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2190d2f9bbd2284ebf53dfdbd620a7da
https://doi.org/10.1109/iccad.2017.8203780
https://doi.org/10.1109/iccad.2017.8203780
Publikováno v:
2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::07df0aa986cee2628744543dce7224a8
https://doi.org/10.1109/iccad.2017.8203892
https://doi.org/10.1109/iccad.2017.8203892