Zobrazeno 1 - 10
of 25
pro vyhledávání: '"Al Crouch"'
Autor:
Michele Portolan, B.G. Van Treuren, Martin Keim, M. Abdalwahab, Al Crouch, M. Laisne, Jeff Rearick, H. M. von Staudt
Publikováno v:
ITC
HAL
International Test Conference (ITC 2020)
International Test Conference (ITC 2020), Nov 2020, Washington DC, United States
HAL
International Test Conference (ITC 2020)
International Test Conference (ITC 2020), Nov 2020, Washington DC, United States
International audience; Many modern devices have a very limited number of digital pins, yet they are often quite complicated internally. Such These ICs can’t afford the luxury of a traditional JTAG TAP controller and the associated 4 or 5 extra pin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::3e4d12cfaffdd8595e6a508a8babb0b1
https://hal.archives-ouvertes.fr/hal-03002215
https://hal.archives-ouvertes.fr/hal-03002215
Publikováno v:
Computer. 50:92-95
Despite the success of IEEE 1687, it has one significant shortcoming: it's difficult to use on devices without an 1149.1 test access port controller. IEEE P1687.1 addresses this problem.
Publikováno v:
ITC
Web of Science
Web of Science
The number of on-chip embedded instruments required for testing, debugging, and monitoring integrated circuits (ICs) has increased dramatically. The IEEE 1687 (IJTAG) standard can allow efficient access to these embedded instruments by dynamically re
Autor:
Theodore W. Manikas, John C. Potter, Fanchen Zhang, Ping Gui, Al Crouch, Xi Shen, Jennifer Dworak, Yi Sun, R. Iris Bahar, Kundan Nepal
Publikováno v:
NATW
We propose an architecture for an FPGA-based tester for a 3D stacked IC. Our design exploits the underlying structure of the FPGA, allowing it to be used to efficiently store and apply predefined test patterns at a high bandwidth, reducing the FPGA r
Autor:
Al Crouch, Jennifer Dworak
Publikováno v:
EDFA Technical Articles. 13:4-12
3-D silicon integration is reaching the point where it may be deployed. 3-D silicon integration is different from 3-D packaging in that 3-D packaging involves whole packaged chips, and each chip can still be tested individually throughout the manufac
Autor:
Jennifer Dworak, Al Crouch
Publikováno v:
VTS
Today's chips often contain a wealth of embedded instruments, including sensors, hardware monitors, built-in self-test (BIST) engines, etc. They may process sensitive data that requires encryption or obfuscation and may contain encryption keys and Ch
Publikováno v:
ITC
Circuit boards are especially vulnerable to security attacks. Many routes and pins can be probed directly. Other pins may be controlled and observed through the JTAG boundary scan port. The JTAG port may also provide access to each chip's internal sc
Publikováno v:
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014.
Publikováno v:
ITC
IEEE P1687 is a valuable tool for accessing on-chip instruments during test, diagnosis, debug, and board configuration. However, most of these instruments should not be available to an end user in the field. We propose a method for hiding instruments
Publikováno v:
2009 International Test Conference.