Zobrazeno 1 - 4
of 4
pro vyhledávání: '"Akshat Boora"'
Autor:
Visvesh S. Sathe, Diego Pena-Colaiocco, Xun Sun, Rajesh Pamula, Chi-Hsiang Huang, Akshat Boora
Publikováno v:
VLSI Circuits
A new and improved Unified Clock and Power (UniCaP) architecture relies on dual-path feedback to further reduce supply-voltage (V dd ) margins in an ARM Cortex M0 processor while minimizing both peak cycle loss (Δϕ max ) and cycle-loss recovery tim
Autor:
Diego Pena-Colaiocco, Visvesh S. Sathe, Akshat Boora, Xun Sun, Chi-Hsiang Huang, Rajesh Pamula
Publikováno v:
VLSI Circuits
This paper describes a digital control architecture for integrated voltage regulators (IVRs) that achieves time-optimal transient supply-voltage (V dd ) response under random load-current (I load ) fluctuation. Implementing low-complexity low-latency
Publikováno v:
ISSCC
Low-Dropout Regulators (LDOs) play an important role in enabling fine-grained supply-voltage domains for energy-efficient SoC design [1]. Digital LDOs are of particular interest due to integration and scalability advantages, but their transient respo
Publikováno v:
ISSCC
Integrated circuits for ultra-low-power applications strive to minimize total system energy, while satisfying performance requirements. The supply voltage ($V_{dd}$) can be set to a Minimum Energy Point (MEP) [1, 2], where leakage and dynamic energy