Výsledky vyhledávání - "Akio Uenishi"

ESD robustness improvement for integrated DMOS transistors -the different gate-voltage dependence of It2 between VDMOS and LDMOS transistors

Autor: Yasufumi Fujiwara, Shigeto Maegawa, Kenichi Hatasako, T. Kuroi, Akio Uenishi, Fumitoshi Yamamoto

Publikováno v: IEEJ Transactions on Electrical and Electronic Engineering. 6:361-366

This paper presents the device-level electrostatic discharge (ESD) robustness improvement for integrated vertical double-diffused MOS (VDMOS) and lateral double-diffused MOS (LDMOS) transistors by changing device structure. The ESD robustness of VDMO

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::f6387298ff42d34d79c2d64274177235
https://doi.org/10.1002/tee.20669

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An analysis of generation mechanisms of transitional peak current in sense-emitter current for IGBTs with current sense and techniques to remove it

Autor: Akio Uenishi, Hiroyasu Hagino, T. Yamada, Yoshifumi Tomomatsu

Publikováno v: Electrical Engineering in Japan. 115:95-108

It is important to remove the transitional peak current in sense-emitter current which is due to dynamic current-sharing during turn-on for a design of IGBTs with current-sense used protection against overcurrent and short circuit. But this analysis

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::2a33d0060262c6fffe45079dc35dba5d
https://doi.org/10.1002/eej.4391150809

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An analysis of generation mechanisms of the transitional peak current in sense-emitter current for IGBTs with current sense and techniques to remove it

Autor: Hiroyasu Hagino, Akio Uenishi, Yoshifumi Tomomatsu, T. Yamada

Publikováno v: IEEJ Transactions on Electronics, Information and Systems. 115:117-126

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::294a60d80b0a7aca1a099f9508574add
https://doi.org/10.1541/ieejeiss1987.115.1_117

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ESD Robustness Improvement for VDMOS Transistors to Harsh Applications

Autor: Akio Uenishi, Fumitoshi Yamamoto, T. Kuroi, Shigeto Maegawa, Kenichi Hatasako

Publikováno v: Extended Abstracts of the 2008 International Conference on Solid State Devices and Materials.

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::6cf172825073c9540a87a22c8fd32ad6
https://doi.org/10.7567/ssdm.2008.p-5-12l

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A study on the short circuit destruction of IGBTs

Autor: Hiroyasu Hagino, Y. Tomomatsu, I. Takata, Yamashita Junichi, H. Haruguchi, Hideki Takahashi, Akio Uenishi

Publikováno v: [1993] Proceedings of the 5th International Symposium on Power Semiconductor Devices and ICs.

The short-circuit destruction of class n-ch 600-V IGBTs (insulated-gate bipolar transistors) is investigated experimentally and analyzed with the help of device simulation, focusing on three major destruction modes (power constant, energy constant, a

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::014c328c407915fff02e5e0c942d3352
https://doi.org/10.1109/ispsd.1993.297103

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Novel Design of Vertical Double-Diffused Metal–Oxide–Semiconductor Transistor for High Electrostatic Discharge Robustness

Autor: Fumitoshi Yamamoto, Akio Uenishi, Shigeto Maegawa, Kenichi Hatasako, Takashi Kuroi

Publikováno v: Japanese Journal of Applied Physics. 48:04C074

[Bipolar]-[complementary metal–oxide–semiconductor transistor (CMOS)]–[double-diffused metal–oxide–semiconductor transistor (DMOS)] [BiC–DMOS] devices are widely used in high-voltage applications. As some applications require high electro

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::693c6fc992406b6759d1dc77b1362e9e
https://doi.org/10.1143/jjap.48.04c074

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