Zobrazeno 1 - 10
of 10
pro vyhledávání: '"Adnan Bouakaz"'
Autor:
Loïc Besnard, Thierry Gautier, Jean-Pierre Talpin, Hai Nam Tran, Alexandre Honorat, Adnan Bouakaz
Publikováno v:
RTNS
International Conference on Real-Time Networks and Systems
International Conference on Real-Time Networks and Systems, Oct 2017, Grenoble, France. pp.1-10, ⟨10.1145/3139258.3139267⟩
International Conference on Real-Time Networks and Systems
International Conference on Real-Time Networks and Systems, Oct 2017, Grenoble, France. pp.1-10, ⟨10.1145/3139258.3139267⟩
International audience; This paper presents a synthesis tool of real-time system scheduling parameters: ADFG computes task periods and buuer sizes of systems as signal processing applications, resulting in a trade-oo between throughput maximization a
Publikováno v:
ACM Transactions on Design Automation of Electronic Systems
ACM Transactions on Design Automation of Electronic Systems, Association for Computing Machinery, 2017
ACM Transactions on Design Automation of Electronic Systems, 2017
ACM Transactions on Design Automation of Electronic Systems, Association for Computing Machinery, 2017
ACM Transactions on Design Automation of Electronic Systems, 2017
Dataflow models of computation (MoCs) are widely used to design embedded signal processing and streaming systems. Dozens of dataflow MoCs have been proposed in the past few decades. More recently, several parametric dataflow MoCs have been presented
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::7ebfe2887c4190d9183ce0a33059bcc1
https://hal.inria.fr/hal-01417126
https://hal.inria.fr/hal-01417126
Publikováno v:
ACM Transactions on Design Automation of Electronic Systems
ACM Transactions on Design Automation of Electronic Systems, Association for Computing Machinery, 2017
ACM Transactions on Design Automation of Electronic Systems, 2017
ACM Transactions on Design Automation of Electronic Systems, Association for Computing Machinery, 2017
ACM Transactions on Design Automation of Electronic Systems, 2017
The synchronous dataflow model of computation is widely used to design embedded stream-processing applications under strict quality-of-service requirements (e.g., buffering size, throughput, input-output latency). The required analyses can either be
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::496f8a5d4e7b3a7af77d25ee85da82c4
https://hal.inria.fr/hal-01417146
https://hal.inria.fr/hal-01417146
Publikováno v:
RTAS 2016-22nd IEEE Real-Time Embedded Technology & Applications Symposium
RTAS 2016-22nd IEEE Real-Time Embedded Technology & Applications Symposium, Apr 2016, Vienne, Austria. ⟨10.1109/RTAS.2016.7461360⟩
RTAS
RTAS 2016-22nd IEEE Real-Time Embedded Technology & Applications Symposium, Apr 2016, Vienne, Austria. ⟨10.1109/RTAS.2016.7461360⟩
RTAS
International audience; The synchronous dataflow model is widely usedto design real-time streaming applications which must assure aminimum quality-of-service. A benefit of that model is to allowstatic analyses to predict and guarantee timing (e.g., t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::3b5a6977b00a25373e310f849452f7fe
https://inria.hal.science/hal-01253168/file/rtas16.pdf
https://inria.hal.science/hal-01253168/file/rtas16.pdf
Publikováno v:
2014 IEEE Workshop on Signal Processing Systems (SiPS)
2014 IEEE Workshop on Signal Processing Systems (SiPS), Oct 2014, Belfast, United Kingdom
SiPS
2014 IEEE Workshop on Signal Processing Systems (SiPS), Oct 2014, Belfast, United Kingdom
SiPS
International audience; Static dataflow graphs are widely used in design of concurrent real-time streaming applications on multiprocessor systems-on-chip. The increasing complexity of these systems advo- cates using real-time operating systems and dy
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::f11773bbedb440bb993a20136697ea32
https://hal.inria.fr/hal-01092606
https://hal.inria.fr/hal-01092606
Autor:
Adnan Bouakaz, Thierry Gautier
Publikováno v:
International Conference on Formal Methods and Models for System Design
International Conference on Formal Methods and Models for System Design, Oct 2014, Lausanne, Switzerland. ⟨10.1109/MEMCOD.2014.6961838⟩
MEMOCODE
International Conference on Formal Methods and Models for System Design, Oct 2014, Lausanne, Switzerland. ⟨10.1109/MEMCOD.2014.6961838⟩
MEMOCODE
International audience; Static dataflow graphs are widely used to model concurrent real-time streaming applications. Though the state of the art usually advocates static-periodic scheduling of dataflow graphs over dynamic scheduling, the interest in
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::4c1a18736a4bf72a99ca683a663adf62
https://inria.hal.science/hal-01088205
https://inria.hal.science/hal-01088205
Autor:
Thierry Gautier, Jean-Pierre Talpin, Huafeng Yu, Yue Ma, Loïc Besnard, Paul Le Guernic, Adnan Bouakaz
Publikováno v:
Science of Computer Programming
Science of Computer Programming, Elsevier, 2014, Science of Computer Programming, pp.20
Science of Computer Programming, 2014, Science of Computer Programming, pp.20
Science of Computer Programming, Elsevier, 2014, Science of Computer Programming, pp.20
Science of Computer Programming, 2014, Science of Computer Programming, pp.20
High-level modelling languages and standards, such as Simulink, UML, SysML, MARTE and AADL (Architecture Analysis & Design Language), meet increasing adoption in the design of embedded systems in order to carry out system-level analysis, verification
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e9fccad51808efe2a1806a048e0770f5
https://hal.inria.fr/hal-01095010
https://hal.inria.fr/hal-01095010
Autor:
Jean-Pierre Talpin, Adnan Bouakaz
Publikováno v:
International Workshop on Software and Compilers for Embedded Systems
International Workshop on Software and Compilers for Embedded Systems, Jun 2013, St. Goar, Germany. pp.58-67, ⟨10.1145/2463596.2463600⟩
M-SCOPES
International Workshop on Software and Compilers for Embedded Systems, Jun 2013, St. Goar, Germany. pp.58-67, ⟨10.1145/2463596.2463600⟩
M-SCOPES
International audience; Safety-critical Java (SCJ) is designed to enable development of applications that are amenable to certification under safety-critical standards. However, its shared-memory concurrency model causes several problems such as data
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::b49e62ebe0899167ed9c2db837e77a2d
https://inria.hal.science/hal-00916487
https://inria.hal.science/hal-00916487
Publikováno v:
Proceedings of the 2012 12th International Conference on Application of Concurrency to System Design
Proceedings of the 2012 12th International Conference on Application of Concurrency to System Design, Jun 2012, Hamburg, Germany. pp.183-192, ⟨10.1109/ACSD.2012.16⟩
ACSD
Proceedings of the 2012 12th International Conference on Application of Concurrency to System Design, Jun 2012, Hamburg, Germany. pp.183-192, ⟨10.1109/ACSD.2012.16⟩
ACSD
International audience; Data-flow models ease the task of constructing feasible schedules of computations and communications of high-assurance embedded applications. One key and open issue is how to schedule data-flow graphs so as to minimize the buf
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::98c925d6ae5da6a75c8039148a795dc3
https://hal.inria.fr/hal-00763387/file/acsd12.pdf
https://hal.inria.fr/hal-00763387/file/acsd12.pdf
Publikováno v:
The 17th IEEE Real-Time and Embedded Technology and Applications Symposium
The 17th IEEE Real-Time and Embedded Technology and Applications Symposium, Marco Caccamo, Apr 2011, Chicago, United States
HAL
IEEE Real-Time and Embedded Technology and Applications Symposium
The 17th IEEE Real-Time and Embedded Technology and Applications Symposium, Marco Caccamo, Apr 2011, Chicago, United States
HAL
IEEE Real-Time and Embedded Technology and Applications Symposium
International audience; Virtualization and just-in-time (JIT) compilation have become important paradigms in computer science to address application portability issues without deteriorating average-case performance. Unfortunately, JIT compilation rai
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::87f6bef48d5788a0ffe65ed9318e0ca4
https://hal.inria.fr/inria-00589690/document
https://hal.inria.fr/inria-00589690/document