Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Adelson N. Chua"'
Autor:
Adelson N. Chua, Louis P. Alarcon
Publikováno v:
ISCAS
A 450kHz 30kbps all-digital BPSK demodulator is implemented in 65nm CMOS. Correlation and carrier recovery algorithms are designed to be PVT-aware through digital correction. The target BER of 10−6 is achieved through 16 symbol per bit redundancy w
Autor:
John Cris F. Jardin, Joana Rochelle R. Ortiz, Louis P. Alarcon, Bernard Raymond D. Pelayo, Joy Alinda R. Madamba, Rico Jossel M. Maestro, Adelson N. Chua, Renan C. Nuestro, Wes Vernon V. Lofamia, Kristofer Monisit, Ken Bryan F. Fabay
Publikováno v:
CICC
A 44 μW self-powered power line monitoring sensor node is implemented in 65 nm CMOS. A 450 kHz 30 kbps BPSK-modulated transceiver allows for 1.5-meter node-to-node powerline communication at 10E-6 BER. The node has a 3.354 ENOB 50 kSps SAR ADC for c
Autor:
Adelson N. Chua, Eugene John Y. Lim
Publikováno v:
2016 IEEE Region 10 Conference (TENCON).
In an attempt to address the pressing concern for low-power operation, a Dynamic Voltage Scaling (DVS) technique in pipelined processors, Razor, was proposed in 2003 to minimize energy consumption by eliminating supply voltage margins. Razor introduc
Autor:
John Cris F. Jardin, Rico Jossel M. Maestro, Kervin John C. Jocson, Adelson N. Chua, Bernard Raymond D. Pelayo, Ken Bryan F. Fabay, Wes Vernon V. Lofamia, John Richard E. Hizon, Louis P. Alarcon, Joy Alinda R. Madamba, Mark Earvin V. Alba
Publikováno v:
2015 International Workshop on CMOS Variability (VARI).
The delay dependency of digital circuits on process, voltage and temperature variations are usually compensated by using safety margins that set the limit of operating supply voltage or clock frequency. Razor enables the processor to operate beyond t
Autor:
Ramon Garcia, Carlos Oppus, Adelson N. Chua, Ellen Agnes Zafra, Anne Lorraine Luna, Roderick Yap, Louis P. Alarcon, John Richard E. Hizon, Christian Raymund Roque, Mercedenia Lambino
Publikováno v:
MSE
The Eye-C program was instituted to enable a collaborative IC design effort among different universities in the Philippines. This paper presents the impact of the program on the member universities' curriculum during and after its implementation. A p
Autor:
Rico Jossel M. Maestro, Hadrian Renaldo O. Aquino, Joy Alinda R. Madamba, Louis P. Alarcon, Mark Earvin V. Alba, Adelson N. Chua, John Richard E. Hizon, Wes Vernon V. Lofamia
Publikováno v:
TENCON 2012 IEEE Region 10 Conference.
With the increasing popularity of mobile and energy-limited devices, the trend in the field of microprocessor design has shifted from high performance to low power operation. A common low power technique is reducing the supply voltage during periods