Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Ade Bekele"'
Autor:
Mayank Raj, Chuan Xie, Ade Bekele, Adam Chou, Wenfeng Zhang, Ying Cao, Jae Wook Kim, Nakul Narang, Hongyuan Zhao, Yipeng Wang, Kee Hian Tan, Winson Lin, Jay Im, David Mahashin, Santiago Asuncion, Parag Upadhyaya, Yohan Frans
Publikováno v:
2023 IEEE International Solid- State Circuits Conference (ISSCC).
Autor:
Yohan Frans, Hongtao Zhang, David Mahashin, Winson Lin, Yipeng Wang, Jay Im, Stanley Chen, Ken Chang, Adam Chou, Kevin Zheng, Hao-Wei Hung, Arianne Roldan, Ying Cao, Lei Zhou, Declan Carey, Ilias Chlis, Hong Ahn, Jae Wook Kim, Kee Hian Tan, Ronan Casey, Ade Bekele
Publikováno v:
ISSCC
Interest in 112Gb/s wireline transceivers targeting data center and communication applications has rapidly increased. PAM-4 signaling remains the dominant choice of modulation scheme due to its superior spectral efficiency [1-2]. This paper reports a
Autor:
Ade Bekele, Santiago Asuncion, Yohan Frans, Geoffrey Zhan, Ken Chang, Parag Upadhyaya, Daniel Wu
Publikováno v:
2018 IEEE 27th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS).
This paper shows the problem-solving case of on-die crosstalk associated with magnetic coupling through the vertical c4-bumps. Designing a high-speed serializer transmitter (TX) over 50 ohm system requires large current consumption. This naturally ca
Autor:
Ying Cao, Ken Chang, Bob Verbruggen, Ade Bekele, Didem Turker, Parag Upadhyaya, Yohan Frans, Ma Shaojun, Brendan Farley, Christophe Erdmann
Publikováno v:
ISSCC
Direct-RF data converters [1,2] have seen increased adoption in remote-radio-head TX and RX, due to their unparalleled bandwidth and flexibility. However, since these converters need to directly synthesize and sample multi-GHz radio signals, the samp
Publikováno v:
2016 IEEE International Electron Devices Meeting (IEDM).
For the first time, an optimized MOS varactor device design and a new physical based varactor model for advanced FinFET process is presented for high speed analog applications. The varactor is optimized in process and cell design to achieve high tuni
Autor:
Wenfeng Zhang, Junho Cho, Jay Im, Kee Hian Tan, Ken Chang, Parag Upadhyaya, Didem Turkur Melek, Yohan Frans, Scott McLeod, Stanley Chen, Haibing Zhao, Ade Bekele
Publikováno v:
VLSI Circuits
This paper describes the design of a low power fully-adaptive wideband, flexible reach transceiver in 16nm FinFET CMOS embedded within FPGA. The receiver utilizes a 3-stage CTLE with a segmented AGC to minimize parasitic peaking and 15-tap DFE to ope
Autor:
Bruce Xu, Ade Bekele, Jafar Savoj, Hiva Hedayati, Fu-Tai An, Parag Upadhyaya, Hesam Aslanzadeh, Jose Anup P, Yohan Frans, Toan Pham, Stanley Chen, Didem Furker, Daniel Wu, Siok Wei Lim, Jay Im, Ken Chang
Publikováno v:
ISSCC
The introduction of high-speed backplane transceivers inside FPGAs has addressed critical issues such as the ease in scalability of performance, high availability, flexible architectures, the use of standards, and rapid time to market. These have bee
Autor:
Bruce Xu, Elad Alon, Daniel Wu, Chi Fung Poon, Fu-Tai An, Jafar Savoj, Stanley Chen, Parag Upadhyaya, Ken Chang, Ade Bekele, Aman Sewani, Xuewen Jiang, Didem Turker, Kang Wei Lai, Kenny Hsieh, Venna Karthik C
Publikováno v:
VLSIC
This paper describes the design of a fully-adaptive backplane transceiver embedded in a state-of-the-art, low-leakage, 28nm CMOS FPGA. The receive AFE utilizes a three-stage CTLE to provide selective frequency boost for long-tail ISI cancellation. A