Zobrazeno 1 - 10
of 464
pro vyhledávání: '"Address bus"'
Publikováno v:
MIT web domain
© 2004-2012 IEEE. This paper presents post-silicon results for the Ascend secure processor, taped out in a 32 nm SOI process. Ascend prevents information leakage over a processor's digital I/O pins-in particular, the processor's requests to external
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a80287d8cf7152c9d0debeff56751e77
https://doi.org/10.1109/tdsc.2017.2687463
https://doi.org/10.1109/tdsc.2017.2687463
Autor:
A. Padgett Peterson
Publikováno v:
Handbook of Server Management and Administration 1999 ISBN: 9781351072755
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::310458ef60c93ba412528b9f1eb34a0f
https://doi.org/10.1201/9781003069393-c4
https://doi.org/10.1201/9781003069393-c4
Publikováno v:
1997 Annual Conference Proceedings.
This paper provides an overview of a virtual instrument bus created at the University of Maine Orono. Software to support automated tests has become difficult to maintain as the number of test boards and test instruments grows. A variety of test inst
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::dd40f4baa7df63b5f5de1ac943b5a952
https://doi.org/10.18260/1-2--6894
https://doi.org/10.18260/1-2--6894
Publikováno v:
IJCNN
Public transport buses suffer travel time uncertainties owing to diverse factors such as dwell times at bus stops, signals, seasonal variations and fluctuating travel demands etc. Traffic in the developing world in particular is afflicted by addition
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9f287664f1aa3756c3efd40c9f537c59
https://doi.org/10.1109/ijcnn48605.2020.9207455
https://doi.org/10.1109/ijcnn48605.2020.9207455
Autor:
Ravikiran Yeleswarapu, Arun K. Somani
Publikováno v:
PeerJ Computer Science
PeerJ Computer Science, Vol 7, p e359 (2021)
PeerJ Computer Science, Vol 7, p e359 (2021)
As DRAM technology continues to evolve towards smaller feature sizes and increased densities, faults in DRAM subsystem are becoming more severe. Current servers mostly use CHIPKILL based schemes to tolerate up-to one/two symbol errors per DRAM beat.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::bf48f8b4e97b3ad006675fbcc49d0b3a
https://pubmed.ncbi.nlm.nih.gov/33817009
https://pubmed.ncbi.nlm.nih.gov/33817009
Publikováno v:
Lecture Notes in Networks and Systems ISBN: 9789811531712
Many works are being done and continued in the area of agriculture using wireless sensor network (WSN) to detect environmental monitoring, humidity monitoring, soil moisture, air quality (pollution) monitoring, insect monitoring using WSN. It is a va
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9fc14bdceb793420bd29b8513feb12f9
https://doi.org/10.1007/978-981-15-3172-9_8
https://doi.org/10.1007/978-981-15-3172-9_8
Autor:
Ki-Seok Chung, Min-Kyu Lee
Publikováno v:
Electronics Letters. 55:76-78
Dynamic RAM (DRAM) is mainly used as the main memory. As the DRAM density increases, the address bus width required for a DRAM device is also increased. However, in a high-speed DRAM interface, as the address bus becomes wider, not only the routing a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::988765258c890a5f906f91539cfd6d64
https://doi.org/10.1049/el.2018.7108
https://doi.org/10.1049/el.2018.7108
Autor:
Rahul Nair, Matthias Andres
Publikováno v:
Transportation Research Part B: Methodological. 104:123-148
Busy bus routes often suffer from buses not arriving at regular intervals but in bunches at bus stops. In this paper we study this bus bunching phenomenon and address it by a combination of data-driven headway prediction and dynamic holding strategie
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3379004ab6a376bd3b6f81ff2a25e35e
https://doi.org/10.1016/j.trb.2017.06.013
https://doi.org/10.1016/j.trb.2017.06.013
Publikováno v:
IEEE Computer Architecture Letters. 16:141-144
Hardwired dynamic NAND address decoders are widely used in random access memories to decode parts of the address. Replacing wires by resistive elements allows storing and reprogramming the addresses and matching them to an input address. The resistiv
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::20f5c1c88de172e1ff677af49ddec6fb
https://doi.org/10.1109/lca.2017.2670539
https://doi.org/10.1109/lca.2017.2670539
Autor:
Konrad Iwanicki, Michal Ciszewski
Publikováno v:
ACM Transactions on Embedded Computing Systems. 16:1-26
Switching active memory banks at runtime allows a processor with a narrow address bus to access memory that exceeds ranges normally addressable via the bus. Switching code memory banks is regaining interest in microcontrollers for the Internet of Thi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::41863999cdac09d6d4ca4d90b04487ce
https://doi.org/10.1145/3055511
https://doi.org/10.1145/3055511