Zobrazeno 1 - 10
of 119
pro vyhledávání: '"Adamu-Lema F"'
Autor:
Cristoloveanu, S., Lee, K.H., Parihar, M.S., El Dirani, H., Lacord, J., Martinie, S., Le Royer, C., Barbe, J.-Ch., Mescot, X., Fonteneau, P., Galy, Ph., Gamiz, F., Navarro, C., Cheng, B., Duan, M., Adamu-Lema, F., Asenov, A., Taur, Y., Xu, Y., Kim, Y-T., Wan, J., Bawedin, M.
Publikováno v:
In Solid State Electronics May 2018 143:10-19
Autor:
Gerrer, L., Ding, J., Amoroso, S.M., Adamu-Lema, F., Hussin, R., Reid, D., Millar, C., Asenov, A.
Publikováno v:
In Microelectronics Reliability April 2014 54(4):682-697
Publikováno v:
In Microelectronics Reliability September-October 2012 52(9-10):1918-1923
Publikováno v:
In Solid State Electronics 2007 51(4):611-616
Publikováno v:
In Solid State Electronics 2005 49(5):740-746
Autor:
Duan, M., Adamu-Lema, F., Cheng, B., Navarro, C., Wang, X., Georgiev, V.P., Gamiz, F., Millar, C., Asenov, A.
Publikováno v:
SISPAD 2017: International Conference on Simulation of Semiconductor Processes and Devices
Traditional memory devices are facing more challenges due to continuous down-scaling. 6T-SRAM suffers from variability [1-2] and reliability [3-4] issues, which introduce cell stability problems. DRAM cells with one transistor, one capacitor (1T1C) s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::dfbeeab9bfc74de3f2502bef57278b5b
https://eprints.gla.ac.uk/149426/13/149426.pdf
https://eprints.gla.ac.uk/149426/13/149426.pdf
In this paper we present a simulation study of vertically stacked lateral nanowires transistors (NWTs), which may have applications at 5nm CMOS technology. Our simulation approach is based on a collection of simulation techniques to capture the compl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=core_ac_uk__::fbca56e3c20ad24b222294dfbfcd559c
https://eprints.gla.ac.uk/147784/13/147784.pdf
https://eprints.gla.ac.uk/147784/13/147784.pdf
Akademický článek
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Publikováno v:
International Workshop on Computational Nanotechnology
In this work, we investigated the performance of vertically stacked lateral nanowires transistors (NWTs) considering the effects of series resistance. Also, we consider the vertical positions of the lateral nanowires in the stack and diameter variati
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=core_ac_uk__::cf4e631f513e53ae7c28c410b1a96bc7
https://eprints.gla.ac.uk/149647/2/149647.pdf
https://eprints.gla.ac.uk/149647/2/149647.pdf
Publikováno v:
International Workshop on Computational Nanotechnology
In this work, we present a simulation study of vertically stacked lateral nanowires transistors (NWTs) considering various sources of statistical variability. Our simulation approach is based on various simulations techniques to capture the complexit
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=core_ac_uk__::853a01310c52aa08e9008675b32a3008
https://eprints.gla.ac.uk/149648/2/149648.pdf
https://eprints.gla.ac.uk/149648/2/149648.pdf