Zobrazeno 1 - 10
of 40
pro vyhledávání: '"Accelerated processing unit"'
Publikováno v:
Communications in Computer and Information Science ISBN: 9783030410049
CARLA
CARLA
Bounding Volume Hierarchy (BVH) is the main acceleration mechanism used for improving ray tracing rendering time. Several research efforts have been made to optimize the BVH algorithm for GPU and CPU architectures. Nonetheless, as far as we know, no
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f0cd720994147ef811ee5bdd8c58167f
https://doi.org/10.1007/978-3-030-41005-6_7
https://doi.org/10.1007/978-3-030-41005-6_7
Publikováno v:
SCCC
The ray tracing algorithm is a computationally intensive workload that has active efforts to improve its performance in the CPU and GPU architectures. In this research, we designed a specific implementation of the ray tracing algorithm for the APU ar
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1465ef32d402288a93ec4fb84e224370
https://doi.org/10.1109/sccc49216.2019.8966414
https://doi.org/10.1109/sccc49216.2019.8966414
Publikováno v:
High Performance Computing for Computational Science – VECPAR 2018 ISBN: 9783030159955
VECPAR
VECPAR
The use of heterogeneous architectures has become indispensable in optimizing application performance. Nowadays, one of the most popular heterogeneous architectures is discrete CPU+GPU. Despite the high computational power present in such architectur
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::898f4518976e6108bb0c1893a2144146
https://doi.org/10.1007/978-3-030-15996-2_8
https://doi.org/10.1007/978-3-030-15996-2_8
Publikováno v:
IEEE Micro. 36:22-33
Carrizo is AMD's sixth-generation accelerated processing unit (APU), optimized to deliver performance uplifts and battery-life improvements in thinner and lighter notebook platforms. Its primary goals are to deliver a differentiated gaming and multim
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::23f4c88aeed4dd05bf784d693eda0158
https://doi.org/10.1109/mm.2016.24
https://doi.org/10.1109/mm.2016.24
Publikováno v:
Communications in Computer and Information Science ISBN: 9789811322020
ICPCSEE (1)
ICPCSEE (1)
As CPU processing speed has slowed down year-on-year, heterogeneous “CPU-GPU” architectures combining multi-core CPU and GPU accelerators have become increasingly attractive. Under this backdrop, the Heterogeneous System Architecture (HSA) standa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::489ef340d8dcdd9e3179ff5a662f6853
https://doi.org/10.1007/978-981-13-2203-7_35
https://doi.org/10.1007/978-981-13-2203-7_35
Autor:
Peter Faber, Armin Größlinger
Publikováno v:
IFAC-PapersOnLine. 48:240-245
Graphics processing units have found their way onto the die of embedded CPUs. Embedded devices have thus gained access to on-die parallel co-processors that can be put to good use with the help of the low-level OpenCL standard API, but also using pro
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::24579c159ded31e5171ebe01cc501a9d
https://doi.org/10.1016/j.ifacol.2015.07.040
https://doi.org/10.1016/j.ifacol.2015.07.040
Publikováno v:
International Journal of Networking and Computing. 5:86-104
In this paper we describe our performance-breakdown model for GPU programs. GPUs are a popular choice as accelerator hardware due to their high performance, high availability and relatively low price. However, writing programs that are highly efficie
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3e86a6007b06524017d33fba115068d3
https://doi.org/10.15803/ijnc.5.1_86
https://doi.org/10.15803/ijnc.5.1_86
Akademický článek
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Publikováno v:
IEEE Micro. 34:22-33
The AMD accelerated processing unit (APU) code-named "Kabini" integrates a quad-core CPU and a fully featured GPU. It is the first APU generation to incorporate a complete system-on-a-chip (SoC) IP to provide power efficiency and a small footprint. T
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bf899789345ec997eee5d2df4b7bf40f
https://doi.org/10.1109/mm.2014.3
https://doi.org/10.1109/mm.2014.3
Publikováno v:
SpringSim (HPS)
Proceedings of the 2016 Spring Simulation Multi-Conference (SPRINGSIM).
24th High Performance Computing Symposium (HPC 2016)
24th High Performance Computing Symposium (HPC 2016), Apr 2016, Pasadena, United States. pp.349-356, ⟨10.22360/SpringSim.2016.HPC.040⟩
Scopus-Elsevier
Proceedings of the 2016 Spring Simulation Multi-Conference (SPRINGSIM).
24th High Performance Computing Symposium (HPC 2016)
24th High Performance Computing Symposium (HPC 2016), Apr 2016, Pasadena, United States. pp.349-356, ⟨10.22360/SpringSim.2016.HPC.040⟩
Scopus-Elsevier
International audience; The AMD APU (Accelerated Processing Unit) architecture, which combines CPU and GPU cores on the same die at a low power budget, promises a significant advent in GPU computing, in particular to applications which performance is
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::f44f542fe8b4ec71189ba7711c7bae1e
https://doi.org/10.22360/springsim.2016.hpc.040
https://doi.org/10.22360/springsim.2016.hpc.040