Zobrazeno 1 - 10
of 210
pro vyhledávání: '"Abhinav Kranti"'
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 7, Pp 276-281 (2019)
In this paper, we propose a novel structure of doping-less 1T-DRAM with raised body and Schottky contact to source/drain regions which uses thermionic emission to generate electrons and holes. As the device is free from physical doping, the problems
Externí odkaz:
https://doaj.org/article/c453c86974bc47caa78e6e295f05039d
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 5, Iss 1, Pp 59-63 (2017)
We experimentally demonstrate a new type of silicon-based capacitorless one-transistor dynamic random access memory (1T-DRAM) with an electron-bridge channel. The fabrication steps are fully compatible with modern CMOS technology. An underlap device
Externí odkaz:
https://doaj.org/article/4f754c5547b8407dbced11ab41908dec
Publikováno v:
IEEE Transactions on Electron Devices. 69:3983-3989
Publikováno v:
2023 International VLSI Symposium on Technology, Systems and Applications (VLSI-TSA/VLSI-DAT).
Publikováno v:
IEEE Transactions on Electron Devices. 69:3163-3168
Publikováno v:
IEEE Transactions on Electron Devices. 68:4797-4800
The operation of reconfigurable field effect transistor (RFET) is governed by Schottky barrier, ungated regions as well as control and polarity gates. The inherent architecture of RFET, apart from lowering the effective drain bias, impedes the use of
Autor:
Nima Dehdashti Akhavan, Jean-Pierre Colinge, Renan Trevisoli, Isabelle Ferain, Ran Yu, Marcelo Antonio Pavanello, Rodrigo T. Doria, Ran Yan, Pedram Razavi, Michelly de Souza, Abhinav Kranti, Chi-Woo Lee
Publikováno v:
Journal of Integrated Circuits and Systems. 6:114-121
This paper performs a comparative study of the analog performance of Junctionless Nanowire Transistors (JNTs) and classical Trigate inversion mode (IM) devices focusing on the harmonic distortion. The study has been carried out in the temperature ran
Publikováno v:
IEEE Transactions on Electron Devices. 67:3868-3875
In this work, we present purely device-dependent conditions for achieving hysteresis-free sub-60 mV/decade (HF-sub-60) current transition in metal–ferroelectric–insulator–semiconductor (MFIS) nanowire transistor. The proposed bias-independent c
Publikováno v:
Japanese Journal of Applied Physics. 62:SC1040
High-speed write/read operation and low energy consumption along with a lower footprint are prerequisites for one transistor (1 T) embedded DRAM (eDRAM). This work evaluates the suitability of two different reconfigurable transistors (RFET) architect