Zobrazeno 1 - 10
of 13
pro vyhledávání: '"Aaron L. Swecker"'
Publikováno v:
IEEE Transactions on Semiconductor Manufacturing. 17:619-628
Wafer inspection schemes for next-generation lithography (NGL) will play a key role in controlling defect mechanisms and maintaining an acceptable yield. Developing these wafer inspection schemes will require characterization and optimization of deep
Publikováno v:
13th Annual IEEE/SEMI Advanced Semiconductor Manufacturing Conference. Advancing the Science and Technology of Semiconductor Manufacturing. ASMC 2002 (Cat. No.02CH37259).
Wafer inspection schemes for next generation lithography (NGL) will play a key role in controlling defect mechanisms and maintaining an acceptable yield. Developing these wafer inspection schemes will require characterization and optimization of DUV
Publikováno v:
1997 IEEE International Symposium on Semiconductor Manufacturing Conference Proceedings (Cat. No.97CH36023).
In this paper, the use of Fourier filtering in dark field defect detection is investigated for the post chemical mechanical polishing (CMP) inspection application using a simulation tool, METRO. Advanced detection techniques have been studied to dete
Publikováno v:
1997 IEEE International Symposium on Semiconductor Manufacturing Conference Proceedings (Cat. No.97CH36023).
The transformation of contaminating particles into defects and then electrical faults is a very complex process which depends on the defect location, size, material and the underlying IC topography. A rigorous topography simulator, METROPOLE has been
Publikováno v:
1997 IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop ASMC 97 Proceedings.
In this paper, various defect detection schemes are investigated for the post chemical mechanical polishing (CMP) inspection application using the simulation tool, METRO. Both bright field and dark field detection schemes have been studied to determi
Publikováno v:
SISPAD '97. 1997 International Conference on Simulation of Semiconductor Processes and Devices. Technical Digest.
The detection of critical defects on modern VLSI wafers is a challenging and complex problem. Simulation of these critical defects allows for rapid characterization and optimization of in-line detection schemes. In this paper we introduce a 3D electr
Publikováno v:
Scopus-Elsevier
Particulate contamination deposited on silicon wafers is typically the dominant reason for yield loss in VLSI manufacturing. The transformation of contaminating particles into defects and then electrical faults is a very complex process which depends
Publikováno v:
SPIE Proceedings.
The production of 70nm devices is projected for the year 2008. With this projection, optical lithography will become more challenging since as the device size goes down, the potential for introducing killer defects also increases dramatically. Wafer
Publikováno v:
SPIE Proceedings.
We have extended the capability of a vector 3D lithography simulator METROPOLE-3D from a photomask simulator to become a full 3D photolithography simulator. It is designed to run moderately fast on conventional engineering workstations. METROPOLE-3D
Publikováno v:
Microelectronic Manufacturing Yield, Reliability, and Failure Analysis III.
Particulate contamination deposited on silicon wafers is typically the dominant reason for yield loss in VLSI manufacturing. The transformation of contaminating particles into defects and then electrical faults is a very complex process which depends