Zobrazeno 1 - 10
of 16
pro vyhledávání: '"Aamir Zia"'
Autor:
Xuelian Liu, Aamir Zia
Publikováno v:
Radioengineering, Vol 22, Iss 4, Pp 975-984 (2013)
This paper describes a three- dimensional DRAM in which the floating body capacitance (FBC) of a fully depleted SOI (FD-SOI) device is used as a storage node. This 1T DRAM lends itself particularly well to a 3D wafer-to-wafer bonding process because
Externí odkaz:
https://doaj.org/article/36177e8c458a4183902ff3191a293073
Publikováno v:
2019 IEEE Conference on Sustainable Utilization and Development in Engineering and Technologies (CSUDET).
The Electrical Grid (EG) is considered to function as an arrangement residing of distribution, transmission and generation with the help and support of different controlling devices to sustain system constancy, productivity & reliability. Operation a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d9159a8659d9d2e20e457ba4b4c733b9
https://doi.org/10.1109/csudet47057.2019.9214688
https://doi.org/10.1109/csudet47057.2019.9214688
Publikováno v:
2019 IEEE Conference on Sustainable Utilization and Development in Engineering and Technologies (CSUDET).
The increasing demand of energy in the world is increasing by every day as not only the population is increasing but also the everyday tools and the appliances that make our lives better. This increase in demand is a major issue in developing countri
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5aa7be0a19952624c2a57d9e263b8909
https://doi.org/10.1109/csudet47057.2019.9214750
https://doi.org/10.1109/csudet47057.2019.9214750
Publikováno v:
2019 IEEE/IAS 55th Industrial and Commercial Power Systems Technical Conference (I&CPS).
The Electrical Grid (EG) is considered to function as an arrangement residing of distribution, transmission and generation with the help and support of different controlling devices to sustain system constancy, productivity & reliability. Operation a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e6efc2a786c44a25601525cf8ebdbd5d
https://doi.org/10.1109/icps.2019.8733370
https://doi.org/10.1109/icps.2019.8733370
Publikováno v:
International Journal of Research in Medical Sciences. :5041-5046
Background: Gallstone diseases are one of the most common public health problems. Approximately 10%-20% of the national adult populations currently carry gallstones, and gallstone prevalence is rising. The purpose of the study was to find out associa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8ae98f7e54a4a0ae5a9cc55363a72c3e
https://doi.org/10.18203/2320-6012.ijrms20163814
https://doi.org/10.18203/2320-6012.ijrms20163814
Autor:
Ryan Clarke, Mitchell R. LeRoy, John F. McDonald, Russell P. Kraft, Michael Chu, Hadrian Olayvar Aquino, Aamir Zia, Srikumar Raman, Xuelian Liu
Publikováno v:
IET Circuits, Devices & Systems. 8:487-498
This study documents the speeds of various SRAM buffer memories that are possible in a contemporary fast SiGe heterojunction bipolar transistor (HBT) BiCMOS process. An SRAM in a 0.13 µm HBT BiCMOS technology using current mode logic (CML)-style cir
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f7ba06b877c8365959ba832f019a11a6
https://doi.org/10.1049/iet-cds.2013.0375
https://doi.org/10.1049/iet-cds.2013.0375
Publikováno v:
Microelectronics Journal. 42:1380-1390
With an increasing number of processors forming many-core chip multiprocessors (CMP), there exists a need for easily scalable, high-performance and low-power intra-chip communication infrastructure for emerging systems. In CMPs with hundreds of proce
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::13e8c198c9f5940ccc2f1d9fe786f084
https://doi.org/10.1016/j.mejo.2011.09.013
https://doi.org/10.1016/j.mejo.2011.09.013
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 18:967-977
Slow cache memory systems and low memory bandwidth present a major bottleneck in performance of modern microprocessors. 3-D integration of processor and memory subsystems provides a means to realize a wide data bus that could provide a high bandwidth
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::02c5aaff9b1021031804a823baeda4ed
https://doi.org/10.1109/tvlsi.2009.2017750
https://doi.org/10.1109/tvlsi.2009.2017750
Autor:
Okan Erdogan, Jin-Woo Kim, Aamir Zia, Russell P. Kraft, P.M. Belemjian, John F. McDonald, K. Bernstein, Philip Jacob, Michael Chu
Publikováno v:
Proceedings of the IEEE. 97:108-122
Three-dimensional chip (3-D) stacking technology provides a new approach to address the so-called memory wall problem. Memory processor chip stacking reduces this memory wall problem, permitting faster clock rates (with suitable processor logic) or p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::88d04e15a7f5ec91983829980a77aec0
https://doi.org/10.1109/jproc.2008.2007472
https://doi.org/10.1109/jproc.2008.2007472
Publikováno v:
IEEE Design and Test of Computers. 22:540-547
We are exploring a 3D processor-memory stack for use with the message passing interface (MPI). The communication among processors in huge servers wastes several thousands of cycles. Most of these wasted cycles do not come from the communication link
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7aafda9818ccc7503147f2ff277cfc09
https://doi.org/10.1109/mdt.2005.151
https://doi.org/10.1109/mdt.2005.151