Zobrazeno 1 - 10
of 59
pro vyhledávání: '"ALMUDENA LINDOSO"'
Publikováno v:
IEEE Access, Vol 11, Pp 128706-128723 (2023)
In various fields, such as those with high-reliability requirements, there is a growing demand for high-performance microprocessors. Whereas commercial microprocessors offer a good trade-off between cost, size, and performance, they often need to be
Externí odkaz:
https://doaj.org/article/ca6727c4f2e94ea58ebc39c0b8d9b9fc
Autor:
Luis Entrena, Antonio J. Sanchez-Clemente, Luis A. Garcia-Astudillo, Marta Portela-Garcia, Mario Garcia-Valderas, Almudena Lindoso, Roberto Sarmiento
Publikováno v:
IEEE Access, Vol 11, Pp 116127-116140 (2023)
Digital circuits for space applications can suffer from operation failures due to radiation effects. Error detection and mitigation techniques are widely accepted solutions to improve dependability of digital circuits under Single Event Upsets (SEUs)
Externí odkaz:
https://doaj.org/article/d669d315b98c4ebcaa0a8687e60dc387
Publikováno v:
IEEE Access, Vol 10, Pp 20643-20651 (2022)
Error mitigation techniques, such as Triple Modular Redundancy, introduce very large overheads. To alleviate this overhead, approximate techniques can be used. In this work we propose a novel approximate error mitigation technique based on using redu
Externí odkaz:
https://doaj.org/article/0b5f66f2009040ad84b71ad3101b7b81
Autor:
Diego Lloria, Pablo M. Aviles, Jose A. Belloch, Sandra Roger, Carmen Botella-Mascarell, Almudena Lindoso
Publikováno v:
Lloria, Diego Aviles Marin, Pablo Manuel Belloch, Jose A. Roger Varea, Sandra Botella Mascarell, Carmen Lindoso Muñoz, Almudena 2023 Hybrid CPU-GPU implementation of the transformed spatial domain channel estimation algorithm for mmWave MIMO systems Journal of Supercomputing 79 9 9371 9382
Hybrid platforms combining multicore Central Processing Units (CPU) with many-core hardware accelerators such as Graphic Processing Units (GPU) can be smartly exploited to provide efficient parallel implementations of wireless communication algorithm
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::4b1b5bf050b2ca8fc24d1b37c008d17e
https://doi.org/10.1007/s11227-022-05018-w
https://doi.org/10.1007/s11227-022-05018-w
Autor:
Luis Ángel García Astudillo, ALMUDENA LINDOSO, Luis Entrena, HONORIO MARTIN, PEDRO MARTÍN-HOLGADO, Mario García Valderas
Publikováno v:
IEEE Transactions on Nuclear Science. 69:1485-1491
Reduced precision redundancy (RPR) is an alternative to triple modular redundancy (TMR) that reduces the area overhead at the expense of minor accuracy loss in case of error. In this work, we propose a Scaled RPR approach for multistage circuits and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::416268fdff999e14b61109adef3e8b97
https://doi.org/10.1109/tns.2022.3147599
https://doi.org/10.1109/tns.2022.3147599
Autor:
ALMUDENA LINDOSO, Alejandro Serrano Cases, Antonio Martínez-Álvarez, Sergio Cuenca-Asensi, Luis Entrena, Yolanda Morilla, M. Peña-Fernandez, PEDRO MARTÍN-HOLGADO
Publikováno v:
IEEE Transactions on Nuclear Science. 69:1574-1581
This work presents the evaluation of a new dual-core lockstep hybrid approach aimed to improve the fault tolerance in microprocessors. Our approach takes advantage of modern multicore processor resources to combine software-based lockstep with a cust
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::87c446ecd820c4110e523ede63849f13
https://doi.org/10.1109/tns.2022.3149867
https://doi.org/10.1109/tns.2022.3149867
Publikováno v:
The Journal of Supercomputing. 78:14756-14767
The emerging Multi-Processor System-on-Chip (MPSoC) technology, which combines heterogeneous computing with the high performance of field programmable gate arrays (FPGA), is a promising platform for a large number of applications, including wireless
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::70e5c3e731d9f9387bc02835676dbde8
https://doi.org/10.1007/s11227-022-04479-3
https://doi.org/10.1007/s11227-022-04479-3
Autor:
Germán León, Luis Entrena, Almudena Lindoso, José M. Badía, Mario Garcia-Valderas, Jose A. Belloch
Publikováno v:
Repositori Universitat Jaume I
Universitat Jaume I
e-Archivo. Repositorio Institucional de la Universidad Carlos III de Madrid
instname
Universitat Jaume I
e-Archivo. Repositorio Institucional de la Universidad Carlos III de Madrid
instname
Commercial off-the-shelf (COTS) system-on-chip (SoC) are becoming widespread in embedded systems. Many of them include a multicore central processing unit (CPU) and a high-end graphics processing unit (GPU). They combine high computational performanc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::957b9746a5918b04aa3a60899aada5e3
https://doi.org/10.1109/tns.2021.3128722
https://doi.org/10.1109/tns.2021.3128722
Publikováno v:
11 Euro American Conference on Telematics and Information Systems.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f904ffd7666ba762f2a10e0076fa6c5a
https://doi.org/10.1145/3544538.3544662
https://doi.org/10.1145/3544538.3544662
Error mitigation techniques, such as Triple Modular Redundancy, introduce very large overheads. To alleviate this overhead, approximate techniques can be used. In this work we propose a novel approximate error mitigation technique based on using redu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e9d826b97047f34f379d64bd14aab645
https://hdl.handle.net/10016/37122
https://hdl.handle.net/10016/37122
