Zobrazeno 1 - 10
of 62
pro vyhledávání: '"ACM: D.: Software/D.3: PROGRAMMING LANGUAGES/D.3.4: Processors/D.3.4.1: Compilers"'
Publikováno v:
[Research Report] RR-9442, Inria; Waseda University. 2021, pp.20
Array contraction is a compilation optimization used to reduce the memory con-sumption, by shrinking the size of temporary arrays while preserving the correctness. The usualapproach to this problem is to perform a static analysis of the given program
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::7512413b213a0dd57defb4fccab4fc41
https://hal.inria.fr/hal-03482055/document
https://hal.inria.fr/hal-03482055/document
Autor:
Kobeissi, Salwa
Publikováno v:
Computation and Language [cs.CL]. Université de Strasbourg, 2021. English. ⟨NNT : ⟩
Other [cs.OH]. Université de Strasbourg, 2021. English. ⟨NNT : 2021STRAD012⟩
Computation and Language [cs.CL]. Université de Strasbourg, 2021. English
Other [cs.OH]. Université de Strasbourg, 2021. English. ⟨NNT : 2021STRAD012⟩
Computation and Language [cs.CL]. Université de Strasbourg, 2021. English
In this thesis, we introduce Rec2Poly, a framework for speculative rewriting of recursive programs as affine loops that are candidates for efficient optimization and parallelization. Rec2Poly seeks a polyhedral-compliant run-time control and memory b
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::c2644ed47adbdb5ba6084fa3365955a2
https://theses.hal.science/tel-03495816
https://theses.hal.science/tel-03495816
Publikováno v:
ACM Transactions on Architecture and Code Optimization
ACM Transactions on Architecture and Code Optimization, Association for Computing Machinery, 2017, 14 (4), pp.36. ⟨10.1145/3141234⟩
ACM Transactions on Architecture and Code Optimization, 2017, 14 (4), pp.36. ⟨10.1145/3141234⟩
ACM Transactions on Architecture and Code Optimization, Association for Computing Machinery, 2017, 14 (4), pp.36. ⟨10.1145/3141234⟩
ACM Transactions on Architecture and Code Optimization, 2017, 14 (4), pp.36. ⟨10.1145/3141234⟩
International audience; Secure elements widely used in smartphones, digital consumer electronics, and payment systems are subject to fault attacks. To thwart such attacks, software protections are manually inserted requiring experts and time. The exp
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::2c508c83e7b89bf82410ed95e9ebb008
https://doi.org/10.1145/3141234
https://doi.org/10.1145/3141234
Autor:
Alias, Christophe
Publikováno v:
Hardware Architecture [cs.AR]. ENS de Lyon, 2019
Since the end of Dennard scaling, power efficiency is the limiting factor for large-scale computing. Hardware accelerators such as reconfigurable circuits (FPGA, CGRA) or Graphics Processing Units (GPUs) were introduced to improve the performance und
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od_______212::9823d5d0093f7f2456d0a084eebc7d87
https://hal.inria.fr/tel-02151877/file/hdr-alias.pdf
https://hal.inria.fr/tel-02151877/file/hdr-alias.pdf
Autor:
Alias, Christophe
Publikováno v:
Hardware Architecture [cs.AR]. ENS de Lyon, 2019
Since the end of Dennard scaling, power efficiency is the limiting factor for large-scale computing. Hardware accelerators such as reconfigurable circuits (FPGA, CGRA) or Graphics Processing Units (GPUs) were introduced to improve the performance und
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::9823d5d0093f7f2456d0a084eebc7d87
https://hal.inria.fr/tel-02151877/file/hdr-alias.pdf
https://hal.inria.fr/tel-02151877/file/hdr-alias.pdf
Publikováno v:
[Research Report] RR-9233, INRIA Grenoble-Rhone-Alpes. 2018, pp.1-28
Tiling is a crucial program transformation, adjusting the ops-to-bytes balance of codes to improvelocality. Like parallelism, it can be applied at multiple levels. Allowing tile sizes to be symbolicparameters at compile time has many benefits, includ
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::35e3772d0665d3942d59341df8413a88
https://hal.inria.fr/hal-01952593/file/RR-9233.pdf
https://hal.inria.fr/hal-01952593/file/RR-9233.pdf
Publikováno v:
[Research Report] RR-9233, INRIA Grenoble-Rhone-Alpes. 2018, pp.1-28
Tiling is a crucial program transformation, adjusting the ops-to-bytes balance of codes to improvelocality. Like parallelism, it can be applied at multiple levels. Allowing tile sizes to be symbolicparameters at compile time has many benefits, includ
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od_______212::35e3772d0665d3942d59341df8413a88
https://hal.inria.fr/hal-01952593/file/RR-9233.pdf
https://hal.inria.fr/hal-01952593/file/RR-9233.pdf
Publikováno v:
ACM Transactions on Architecture and Code Optimization
ACM Transactions on Architecture and Code Optimization, Association for Computing Machinery, 2018, 15 (1), pp.1-25. ⟨10.1145/3177961⟩
ACM Transactions on Architecture and Code Optimization, 2018, 15 (1), pp.1-25. ⟨10.1145/3177961⟩
ACM Transactions on Architecture and Code Optimization, Association for Computing Machinery, 2018, 15 (1), pp.1-25. ⟨10.1145/3177961⟩
ACM Transactions on Architecture and Code Optimization, 2018, 15 (1), pp.1-25. ⟨10.1145/3177961⟩
International audience; Parallelism is one of the key performance sources in modern computer systems. When heuristics-based automatic parallelization fails to improve performance, a cumbersome and error-prone manual transformation is often required.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::1ce3956f9776d6334affb4ff1ad63434
https://hal.inria.fr/hal-01744426/file/TACO_HAL.pdf
https://hal.inria.fr/hal-01744426/file/TACO_HAL.pdf
Autor:
Caroline Collange, Vinícius Fernandes dos Santos, Fernando Magno Quintão Pereira, Marcos Yukio Siraichi
Publikováno v:
CGO 2018-International Symposium on Code Generation and Optimization
CGO 2018-International Symposium on Code Generation and Optimization, Feb 2018, Vienna, Austria. pp.1-12, ⟨10.1145/3168822⟩
CGO 2018: Proceedings of the 2018 International Symposium on Code Generation and Optimization
CGO 2018-International Symposium on Code Generation and Optimization, Feb 2018, Vienna, Austria. pp.1-12, ⟨10.1145/3168822⟩
CGO 2018: Proceedings of the 2018 International Symposium on Code Generation and Optimization
International audience; In May of 2016, IBM Research has made a quantum processor available in the cloud to the general public. The possibility of programming an actual quantum device has elicited much enthusiasm. Yet, quantum programming still lacks
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::72b59b425bed9cf5b6548fdf56094165
https://doi.org/10.1145/3168822
https://doi.org/10.1145/3168822
Autor:
Albert Cohen, Vivek Sarkar, Chandan Reddy, Sven Verdoolaege, Jun Shirako, Oleksandr Zinenko, Tobias Grosser
Publikováno v:
CC'18-27th International Conference on Compiler Construction
CC'18-27th International Conference on Compiler Construction, Feb 2018, Vienna, Austria. ⟨10.1145/3178372.3179507⟩
CC
CC'18-27th International Conference on Compiler Construction, Feb 2018, Vienna, Austria. ⟨10.1145/3178372.3179507⟩
CC
The construction of effective loop nest optimizers and parallelizers remains challenging despite decades of work in the area. Due to the increasing diversity of loop-intensive applications and to the complex memory/computation hierarchies in modern p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::c9dac89a9f949d80f9bc977762c9ba62
https://hal.inria.fr/hal-01751823/file/paper.pdf
https://hal.inria.fr/hal-01751823/file/paper.pdf