Zobrazeno 1 - 10
of 31
pro vyhledávání: '"A.C. Megdanis"'
Publikováno v:
IBM Journal of Research and Development. 39:83-91
Autor:
A.C. Megdanis, K.R. Wrenner, H.J. Shin, Scott K. Reynolds, M. Immediato, Dale Jonathan Pearson, S. Gowda, R.L. Galbraith
Publikováno v:
IEEE Journal of Solid-State Circuits. 30:1517-1523
This paper presents 8-tap and 10-tap, 6-b filters designed to provide PR-IV channel equalization at data rates in excess of 20 megabyte/s. Achieving high sampling rates while reducing power and area required an optimized distributed-arithmetic (DA) a
Autor:
W. Noble, James D. Warnock, Charles W. Koburger, B. Davari, A.C. Megdanis, J.L. Mauer, Toshiharu Furukawa, Yuan Taur
Publikováno v:
Technical Digest., International Electron Devices Meeting.
A shallow trench isolation (STI) technology, RIE (reactive ion etching), CVD (chemical vapor deposition) oxide fill, and polarization are used to realize lithography-limited, submicron device and isolation dimensions. A novel boron diffusion techniqu
Autor:
M.R. Polcari, M. Rodriguez, E. Petrillo, Bijan Davari, P.A. McFarland, Tak H. Ning, Denny D. Tang, Yuan Taur, Keith Jenkins, D. Danner, A.C. Megdanis, Ghavam G. Shahidi
Publikováno v:
International Electron Devices Meeting 1991 [Technical Digest].
A novel lateral bipolar structure on SOI (silicon-on-insulator) is described. This device has a thin double-diffused base and a narrow emitter width, determined by the SOI thickness. It has minimal parasitic junction capacitance, as well as minimal e
Autor:
P.J. Coane, Stephan A. Cohen, T.V. Rajeevakumar, T. Lii, Gary B. Bronner, Keith T. Kwietniak, P.A. McFarland, Z.A. Weinberg, Kenneth J. Stein, A.C. Megdanis
Publikováno v:
International Electron Devices Meeting 1991 [Technical Digest].
The authors have demonstrated trench capacitors with openings down to 0.25 mu m*0.25 mu m and aspect ratios as high as 40, and with a capacitance of 31 fF for 8 nm equivalent ONO (oxide/nitride/oxide) thickness. The projected trench dimensions for a
Autor:
S. Gowda, A.C. Megdanis, K.R. Wrenner, H.J. Shin, D.J. Pearsen, Scott K. Reynolds, M. Immediato, R.L. Galbraith
Publikováno v:
Proceedings ISSCC '95 - International Solid-State Circuits Conference.
Digital FIR filters are key components of state-of-the-art partial-response signaling maximum-likelihood detection (PRML) read/write channel ICs but consume significant circuit area and power. These 10-tap and 8-tap, 6b filters provide PR-IV channel
Autor:
F.J. Hohn, N.J. Mazzeo, P.J. Coane, A.C. Megdanis, E. Petrillo, Keith Jenkins, M.G.R. Thomson, K.N. Chiong, M.E. Rothwell, James D. Warnock, J.Y.-C. Sun, John D. Cressler, Denny D. Tang, Joachim N. Burghartz
Publikováno v:
IEEE Electron Device Letters. 13:262-264
The full leverage offered by electron-beam lithography has been exploited in a scaled 0.25- mu m double polysilicon bipolar technology. Devices and circuits were fabricated using e-beam lithography for all mask levels with level-to-level overlays tig
Autor:
James H. Comfort, J.M.C. Stork, Woo-Hyeong Lee, J.Y.-C. Sun, A.C. Megdanis, Emmanuel F. Crabbe, John D. Cressler, Bernard S. Meyerson
Publikováno v:
IEEE Electron Device Letters. 13:259-261
The authors report a thermal-cycle emitter process using phosphorus for the fabrication of self-aligned SiGe-base heterojunction bipolar transistors. The low thermal cycle results in extremely, narrow basewidths and preservation of lightly doped spac
Autor:
Keith A. Jenkins, Joachim N. Burghartz, John D. Cressler, James H. Comfort, C.L. Stanis, A.C. Megdanis, F. Cardone, J.Y.-C. Sun
Publikováno v:
IEEE Electron Device Letters. 12:679-681
An in-situ doped polysilicon emitter process for very shallow and narrow emitter formation and minimum emitter resistance is presented. An in-situ doped film was imbedded between two undoped poly spacer layers as a buried diffusion source (BDS) to re
Autor:
A.C. Megdanis, Emmanuel F. Crabbe, Phillip J. Restle, S. Verdonckt-Vandebroek, C.L. Stanis, A.C. Warren, J.M.C. Stork, David L. Harame, Bernard S. Meyerson, A.A. Bright, Gerrit Kroesen
Publikováno v:
IEEE Electron Device Letters. 12:447-449
A novel subsurface SiGe-channel p-MOSFET is demonstrated in which modulation doping is used to control the threshold voltage without degrading the channel mobility. A novel device design consisting of a graded SiGe channel, an n/sup +/ polysilicon ga