Zobrazeno 1 - 10
of 17
pro vyhledávání: '"A.B. Ajjikuttira"'
Publikováno v:
2007 IEEE International Workshop on Radio-Frequency Integration Technology.
This paper describes the detailed design considerations and verification of a 2.35-Gbps burst-mode clock and data recovery circuit. This CDR circuit utilizes a gated-oscillator clock recovery technique with an additional phase locked frequency acquis
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ebc02c8e169048c856c690da8f927155
https://doi.org/10.1109/rfit.2007.4443928
https://doi.org/10.1109/rfit.2007.4443928
Autor:
A.B. Ajjikuttira, Chun Kiat Chua
Publikováno v:
2007 International Symposium on Integrated Circuits.
This paper describes the design of a 2.5 Gbps burst mode laser diode driver fabricated in 0.18-mum CMOS process. This driver operates with a 1.8 V and 3.3 V power supply and is able to provide up to 30 mA bias current and 20 mA modulation current. Th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cfd0a6d8480fb396fb67b76e5fbb9872
https://doi.org/10.1109/isicir.2007.4441828
https://doi.org/10.1109/isicir.2007.4441828
Publikováno v:
ESSCIRC
A fully differential CDR circuit realized in 0.18-mum CMOS technology targeted for the ONU in GPON applications at 2.5 Gb/s is presented. The CDR demonstrates very low RMS jitter of 1.4 psec, along with a acquisition range of 220 MHz employing a simp
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b5c93bd321ea0d0545f4462ff766993a
https://doi.org/10.1109/esscirc.2007.4430357
https://doi.org/10.1109/esscirc.2007.4430357
Autor:
Dan Shen, Ravinder Pal Singh, Wooi Gan Yeoh, Bin Zhao, M. Kumarasamy Raja, Pradeep Basappa Khannur, Xuesong Chen, Ye Wu, A.B. Ajjikuttira, Dan Lei Yan
Publikováno v:
2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium.
A UHF RFID reader IC in 0.18 mum CMOS covering the entire 860 MHz to 960 MHz RFID band is presented in this paper. The IC meets the EPC Class-1 Generation-2 and ISO-18000 standards. The transmitter output is +10 dBm and the receiver sensitivity is -9
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::87e4d128e4065aa48c10274ddb45af5d
https://doi.org/10.1109/rfic.2007.380880
https://doi.org/10.1109/rfic.2007.380880
Autor:
null My The Doan, null Qian Yin, null Khoo Ee Sze, P.B. Khannur, S.C. Rustagi, null Shi Jinglin, null Pang Dow Foo, A.B. Ajjikuttira
Publikováno v:
2002 IEEE MTT-S International Microwave Symposium Digest (Cat. No.02CH37278).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d69330b8df1eb38159ac46e49f7a9d81
https://doi.org/10.1109/mwsym.2002.1011672
https://doi.org/10.1109/mwsym.2002.1011672
Publikováno v:
Proceedings. IEEE Asia-Pacific Conference on ASIC.
A high-speed dual-modulus divide-by-32/33 prescaler (DMP) has been fabricated in a standard 0.18 /spl mu/m CMOS process. It consists of a divide-by-4/5 synchronous divider implemented in MOS current-mode logic and a divide-by-8 asynchronous counter r
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::da0ac5e82254cc0be4a32fb17a76c4ec
https://doi.org/10.1109/apasic.2002.1031534
https://doi.org/10.1109/apasic.2002.1031534
Autor:
Q. Yin, Pang, Pradeep Basappa Khannur, S. Jinglin, A.B. Ajjikuttira, K.E. Sze, S.C. Rustagi, D. Foo, M.T. Doan
Publikováno v:
2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No.02CH37280).
On-chip copper inductors, MIM capacitors and precision resistors in a novel, low-cost process are described. A CMOS transceiver for Bluetooth was realized with these new RF passive components and compared with the same IC realized in a commercial 0.3
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::72e0c3d2ee3c0db0462de1969a548867
https://doi.org/10.1109/rfic.2002.1012080
https://doi.org/10.1109/rfic.2002.1012080
Publikováno v:
2003 5th International Conference on ASIC Proceedings (IEEE Cat No 03TH8690) ICASIC-03.
A 10-GB/s 1:4 demultiplexer (demux) circuits has been implemented in a standard 0.18-mm CMOS process for optical fiber communication systems. A MOS current-steering (MCS) latch is used in the design of the high-speed D-flip-flops. The circuit operate
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::70fffb949c8abc9dc25e41b36a29a925
https://doi.org/10.1109/icasic.2003.1277400
https://doi.org/10.1109/icasic.2003.1277400
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Conference
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