Zobrazeno 1 - 10
of 28
pro vyhledávání: '"A. Podgaynaya"'
Publikováno v:
In Microelectronics Reliability 2010 50(9):1347-1351
Autor:
Haberfehlner, G., Bychikhin, S., Dubec, V., Heer, M., Podgaynaya, A., Pfost, M., Stecher, M., Gornik, E., Pogany, D.
Publikováno v:
In Microelectronics Reliability 2009 49(9):1346-1351
Publikováno v:
IEEE Transactions on Electron Devices. 57:3044-3049
The influence of the source/body layout on the electrical safe operating area (SOA) of both vertical and lateral double-diffused metal-oxide-semiconductor transistors is experimentally investigated using a transmission line pulse system. Tradeoff bet
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b7fe148ac70f08fd6b571e4b5ade61df
https://doi.org/10.1109/ted.2010.2069564
https://doi.org/10.1109/ted.2010.2069564
Autor:
B. Elattari, Marc Strasser, Ralf Rudolf, Dionyz Pogany, Erich Gornik, Matthias Stecher, A. Podgaynaya
Publikováno v:
Microelectronics Reliability. 50:1347-1351
Electro-thermal destruction of n- and p-channel lateral double-diffused MOS in smart power ICs is investigated by electrical pulse experiments, simulations and failure analysis. It was observed experimentally and by TCAD simulation that the location
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c12967c2a7cf4842f52b829b72ef4d3a
https://doi.org/10.1016/j.microrel.2010.07.075
https://doi.org/10.1016/j.microrel.2010.07.075
Publikováno v:
IEEE Electron Device Letters. 31:1440-1442
Numerical TCAD and transmission line pulse analysis of an electrical safe operating area of a robust p-channel lateral DMOS transistor is performed. The observed independence of the trigger current on the applied gate-source voltage is attributed to
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fde457ac701e2d126b14eb58ed5ca047
https://doi.org/10.1109/led.2010.2081337
https://doi.org/10.1109/led.2010.2081337
Autor:
Martin Pfost, Matthias Stecher, Dragos Costachescu, A. Podgaynaya, Erich Gornik, Sergey Bychikhin, Dionyz Pogany
Publikováno v:
2010 International Conference on Microelectronic Test Structures (ICMTS).
Device temperature is one of the most important limits for the safe operating area and the reliability of power DMOS transistors. Therefore, accurate measurements of their intrinsic device temperature are required. However, standard methods such as I
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e2e86cb93950c3a6b63175007d392f99
https://doi.org/10.1109/icmts.2010.5466872
https://doi.org/10.1109/icmts.2010.5466872
Publikováno v:
2009 International Semiconductor Conference.
Large DMOS transistors are key devices in many smart power ICs where they are often subject to self-heating. This can lead to excessive temperatures especially for shrinked devices in new technologies, asking for accurate modeling by electro-thermal
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6b148d1cbf6fa80fb3580477e71ff5a2
https://doi.org/10.1109/smicnd.2009.5336696
https://doi.org/10.1109/smicnd.2009.5336696
Publikováno v:
2009 IEEE International Reliability Physics Symposium.
Electrical safe operating area (SOA) of doublediffused vertical MOSFETs (VDMOS) in smart power ICs is investigated by simulation and experiments. The influence of the layout of VDMOS cells is analyzed. DMOS transistors with circular/oval cell layout
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b23f7cfc52d702f36c1671b1278ce105
https://doi.org/10.1109/irps.2009.5173293
https://doi.org/10.1109/irps.2009.5173293
Akademický článek
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Autor:
Pfost, M., Costachescu, D., Podgaynaya, A., Stecher, M., Bychikhin, S., Pogany, D., Gornik, E.
Publikováno v:
2010 IEEE International Conference on Microelectronic Test Structures (ICMTS); 2010, p3-7, 5p