Zobrazeno 1 - 10
of 49
pro vyhledávání: '"A. Anita Angeline"'
Publikováno v:
ETRI Journal, Vol 41, Iss 3, Pp 383-395 (2019)
Clock Controlled Dual keeper Domino logic structures (CCDD_1 and CCDD_2) for achieving a high‐speed performance with low power consumption and a good noise margin are proposed in this paper. The keeper control circuit comprises an additional PMOS k
Externí odkaz:
https://doaj.org/article/4e40d15d84ff4633b1b660969e113015
This paper presents a comprehensive exploration of Fast Fourier Transform (FFT) and linear convolution implementations, integrating both conventional methods and novel approaches leveraging the Bit Slicing Multiplier (BSM) technique. The Bit Slicing
Externí odkaz:
http://arxiv.org/abs/2407.01549
Publikováno v:
In Microprocessors and Microsystems April 2024 106
Publikováno v:
ECS Transactions. 107:8885-8896
The advancements in the VLSI regime at lower technology node necessitate robust circuit design. Schmitt trigger design using domino logic style exhibit better hysteresis, higher noise margin, and reduced power consumption while compared to static CMO
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ce30f666d42dd969513efdcc48606c2f
https://doi.org/10.1149/10701.8885ecst
https://doi.org/10.1149/10701.8885ecst
Publikováno v:
ECS Transactions. 107:13675-13686
In this paper, a low-power and high-speed approximate divider using restoring array architecture has been proposed. Approximation is realized by replacing the subtractor/divider cells with the approximate subtractor/divider cells through the use of r
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::51c4213eed143cb407871dec9990a8a9
https://doi.org/10.1149/10701.13675ecst
https://doi.org/10.1149/10701.13675ecst
Autor:
Deepak Kumar Athur, Bhuvanesh Narayanan, Amshuman Gopalakrishnan, Sasipriya Palanisamy, Anita Angeline Augustine
Adders are crucial logical building blocks found almost in all the modern electronic system designs. In the adder architecture design, the fundamental issue is the propagation latency in the carry chain. As the length of the input operands increases,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::579dad1817a366acf55c74bdeae91a52
https://zenodo.org/record/7726997
https://zenodo.org/record/7726997
Publikováno v:
Journal of The Institution of Engineers (India): Series B. 103:669-679
Domino logic circuits occupy a prominent circuit design space in the VLSI regime. The primary attributes of the domino circuits, such as high-performance operation, lesser area and lower power consumption, are found to be limited by leakage current,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9faaf25a0b87cbe0e41873aed17bc33d
https://doi.org/10.1007/s40031-021-00668-5
https://doi.org/10.1007/s40031-021-00668-5
Publikováno v:
International Journal of Electronics. 107:1239-1253
Domino circuit topology for high-speed operation, robustness and lower power consumption is quintessential in design of digital systems. In this paper, various high speed and robust mechanisms are ...
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::30eb831dc48bcf19e2539b9b44b7731b
https://doi.org/10.1080/00207217.2020.1726486
https://doi.org/10.1080/00207217.2020.1726486
Autor:
Srijani Pal, Divya S Salimath, Kuntal Sarkar, Hemavathy S, Anita Angeline. A, V.S. Kanchana Bhaaskaran
Publikováno v:
2022 IEEE Delhi Section Conference (DELCON).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9114527fc80e9c9c0b40e3546a477622
https://doi.org/10.1109/delcon54057.2022.9752955
https://doi.org/10.1109/delcon54057.2022.9752955
Publikováno v:
Communications in Computer and Information Science ISBN: 9783031239724
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::52561713aee7c5ba7dd57ceb12266a41
https://doi.org/10.1007/978-3-031-23973-1_7
https://doi.org/10.1007/978-3-031-23973-1_7