Zobrazeno 1 - 10
of 1 418
pro vyhledávání: '"A, Nikov"'
Autor:
Jan Hrudka, Markéta Kalinová, Hana Fišerová, Karolína Jelínková, Andrej Nikov, Petr Waldauf, Radoslav Matěj
Publikováno v:
Scientific Reports, Vol 14, Iss 1, Pp 1-15 (2024)
Abstract Colorectal cancer (CRC) is a leading global cause of illness and death. There is a need for identification of better prognostic markers beyond traditional clinical variables like grade and stage. Previous research revealed that abnormal expr
Externí odkaz:
https://doaj.org/article/eaf5cf9adfdf46588200296a1c1f35d6
The TeamPlay Project: Analysing and Optimising Time, Energy, and Security for Cyber-Physical Systems
Autor:
Rouxel, Benjamin, Brown, Christopher, Ebeid, Emad, Eder, Kerstin, Falk, Heiko, Grelck, Clemens, Holst, Jesper, Jadhav, Shashank, Marquer, Yoann, De Alejandro, Marcos Martinez, Nikov, Kris, Sahafi, Ali, Lundquist, Ulrik Pagh Schultz, Seewald, Adam, Vassalos, Vangelis, Wegener, Simon, Zendra, Olivier
Publikováno v:
Design, Automation and Test in Europe, Apr 2023, Antwerp, Belgium
Non-functional properties, such as energy, time, and security (ETS) are becoming increasingly important in Cyber-Physical Systems (CPS) programming. This article describes TeamPlay, a research project funded under the EU Horizon 2020 programme betwee
Externí odkaz:
http://arxiv.org/abs/2306.06115
Publikováno v:
21th International Workshop on Worst-Case Execution Time Analysis (WCET 2023) (pp 9:1-9:14) Schloss Dagstuhl - Leibniz-Zentrum fur Informatik
This paper presents EnergyAnalyzer, a code-level static analysis tool for estimating the energy consumption of embedded software based on statically predictable hardware events. The tool utilises techniques usually used for worst-case execution time
Externí odkaz:
http://arxiv.org/abs/2305.14968
Publikováno v:
2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS) (pp. 1-4). IEEE
Energy modelling can enable energy-aware software development and assist the developer in meeting an application's energy budget. Although many energy models for embedded processors exist, most do not account for processor-specific configurations, ne
Externí odkaz:
http://arxiv.org/abs/2301.12806
Autor:
Nikov, Kris, Martinez, Marcos, Wegener, Simon, Nunez-Yanez, Jose, Chamski, Zbigniew, Georgiou, Kyriakos, Eder, Kerstin
This paper presents a novel approach to event-based power modelling for embedded platforms that do not have a Performance Monitoring Unit (PMU). The method involves complementing the target hardware platform, where the physical power data is measured
Externí odkaz:
http://arxiv.org/abs/2106.00565
Energy modeling can enable energy-aware software development and assist the developer in meeting an application's energy budget. Although many energy models for embedded processors exist, most do not account for processor-specific configurations, nei
Externí odkaz:
http://arxiv.org/abs/2104.01055
Autor:
Laurent, Florian, Schneider, Manuel, Scheller, Christian, Watson, Jeremy, Li, Jiaoyang, Chen, Zhe, Zheng, Yi, Chan, Shao-Hung, Makhnev, Konstantin, Svidchenko, Oleg, Egorov, Vladimir, Ivanov, Dmitry, Shpilman, Aleksei, Spirovska, Evgenija, Tanevski, Oliver, Nikov, Aleksandar, Grunder, Ramon, Galevski, David, Mitrovski, Jakov, Sartoretti, Guillaume, Luo, Zhiyao, Damani, Mehul, Bhattacharya, Nilabha, Agarwal, Shivam, Egli, Adrian, Nygren, Erik, Mohanty, Sharada
The Flatland competition aimed at finding novel approaches to solve the vehicle re-scheduling problem (VRSP). The VRSP is concerned with scheduling trips in traffic networks and the re-scheduling of vehicles when disruptions occur, for example the br
Externí odkaz:
http://arxiv.org/abs/2103.16511
Publikováno v:
2015 IEEE 13th International Conference on Embedded and Ubiquitous Computing, Porto, 2015, pp. 205-210
Heterogeneous processors, formed by binary compatible CPU cores with different microarchitectures, enable energy reductions by better matching processing capabilities and software application requirements. This new hardware platform requires novel te
Externí odkaz:
http://arxiv.org/abs/2008.10604
Autor:
Nikov, Kris, Hosseinabady, Mohammad, Asenjo, Rafael, Rodríguezz, Andrés, Navarro, Angeles, Nunez-Yanez, Jose
This paper presents a methodology for simultaneous heterogeneous computing, named ENEAC, where a quad core ARM Cortex-A53 CPU works in tandem with a preprogrammed on-board FPGA accelerator. A heterogeneous scheduler distributes the tasks optimally am
Externí odkaz:
http://arxiv.org/abs/2008.08883
This paper investigates the application of a robust CPU-based power modelling methodology that performs an automatic search of explanatory events derived from performance counters to embedded GPUs. A 64-bit Tegra TX1 SoC is configured with DVFS enabl
Externí odkaz:
http://arxiv.org/abs/2006.12176