Zobrazeno 1 - 10
of 16
pro vyhledávání: '"Matteo Sonza Reorda"'
Autor:
Luca Sterpone, Luis Entrena, Matteo Sonza Reorda, Bradley T. Kiddie, Miguel Aguirre, Fernanda Lima Kastensmidt, Antonio Sanchez-Clemente, Marco Desogus, A. Barnard, Michael Wirthlin, William H. Robinson, Steven M. Guertin, Mario Garcia-Valderas, Heather Quinn, Paolo Rech, David Kaeli
Publikováno v:
IEEE Transactions on Nuclear Science. 62:2547-2554
Performance benchmarks have been used over the years to compare different systems. These benchmarks can be useful for researchers trying to determine how changes to the technology, architecture, or compiler affect the system's performance. No such st
Autor:
Matteo Sonza Reorda, Luca Sterpone, Boyang Du, Fernanda Lima Kastensmidt, Eduardo Chielle, Sergio Cuenca-Asensi
Publikováno v:
LATS
In this paper we combine a set of software-based fault tolerance techniques with a hardware module that monitors the trace port, and explore from an experimental point of view the fault coverage against soft errors in COTS processors that can be achi
Processor cores embedded in systems-on-a-chip (SoCs) are often deployed in critical computations, and when affected by faults they may produce dramatic effects. When hardware hardening is not cost-effective, software implemented hardware fault tolera
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::bf09ecaaf656279f77c00f4331b03ba7
http://hdl.handle.net/11583/1831341
http://hdl.handle.net/11583/1831341
Publikováno v:
SBCCI
An increasing number of safety-critical applications are based on Systems-on-Chip (SoCs), thus pushing a new wave of research aiming at the development of suitable techniques for ensuring their reliability. Several fault tolerance techniques have bee
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::f1f6d93bd14a0ae7761188d1965bd085
http://hdl.handle.net/11583/1658377
http://hdl.handle.net/11583/1658377
Publikováno v:
Politecnico di Torino-IRIS
IOLTS
IOLTS
The reliability of Systems-on-Chip (SoCs) is very important with respect to their use in different types of critical applications. Several fault tolerance techniques have been proposed to improve their fault detection and correction capabilities. The
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::18142d5bce0c91934d80c5399900bc1e
http://hdl.handle.net/11583/1658379
http://hdl.handle.net/11583/1658379
Publikováno v:
Annual Reliability and Maintainability Symposium, 2005. Proceedings..
This paper presents software implemented hardware fault detection (SIHFD) for developing safety critical applications. This fault detection technique provides low-cost solutions to enhance the reliability of computer-based systems without modifying t
Autor:
L. Bolzani, Massimo Violante, Paolo Bernardi, Maurizio Rebaudengo, Matteo Sonza Reorda, Fabian Vargas
Publikováno v:
DSN
In sub-micron technology circuits high integration levels coupled with the increased sensitivity to soft errors even at ground level make the task of guaranteeing systems' dependability more difficult than ever. In this paper we present a new approac
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::c4c24c4d88edd99ea29d8cba7fa6ac66
http://hdl.handle.net/11583/1419006
http://hdl.handle.net/11583/1419006
Publikováno v:
ITC
Evaluating the faulty behaviour of low-cost microprocessor-based boards is an increasingly important issue, due to their usage in many safety critical systems. To address this issue, the paper describes a software-implemented fault injection system b
Publikováno v:
SCAM
Over the last years, an increasing number of safety-critical tasks have been demanded for computer systems. In particular, safety-critical computer-based applications are hitting market areas where cost is a major issue, and thus solutions are requir
Autor:
Massimo Violante, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Pierluigi Civera
Publikováno v:
Field-Programmable Logic and Applications ISBN: 9783540424994
FPL
Scopus-Elsevier
FPL
Scopus-Elsevier
Designers of safety-critical VLSI systems are asking for effective tools for evaluating and validating their designs. Fault Injection is commonly adopted for this task, and its effectiveness is therefore a key factor. In this paper we propose to expl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::0b0ea582e43118b84f3b66389e3db860
https://doi.org/10.1007/3-540-44687-7_51
https://doi.org/10.1007/3-540-44687-7_51