Zobrazeno 1 - 10
of 11
pro vyhledávání: '"Chih-Wei Liu"'
Publikováno v:
IEEE Transactions on Computers. 65:1158-1164
Based on an error-flattened, non-uniform-region linear-approximation algorithm, this brief proposes a low-error and a cost-efficient design procedure for realizing an optimized shift-and-add Logarithmic Unit (LU), which uses minimum hardware to meet
Publikováno v:
Integration. 48:230-238
The main contribution of this study is the development of an area-/energy-efficient cascaded direct-truncation (DT) datapath with the so-called static floating-point (SFP) arithmetic to realize a low-delay analysis filter bank (AFB) for digital heari
Parallelizing Complex Streaming Applications on Distributed Scratchpad Memory Multicore Architecture
Publikováno v:
International Journal of Parallel Programming. 42:875-899
Multicore processors can provide sufficient computing power and flexibility for complex streaming applications, such as high-definition video processing. For less hardware complexity and power consumption, the distributed scratchpad memory architectu
Publikováno v:
ESTImedia
Heterogeneous multi-core systems that contain multiple CPUs and GPUs are gaining momentum, as they are providing different computation power to meet the performance demand of modern applications. On such systems, developers try to fully utilize the c
Publikováno v:
Performance Evaluation. 41:269-293
This paper applies matrix-analytic approach to the examination of the loss behavior of a space priority queue. In addition to the evaluation of the long-term high-priority and low-priority packet loss probabilities, we examine the bursty nature of pa
Publikováno v:
IEEE Transactions on Computers. 48:690-706
An efficient implementation of a parallel version of the Feng-Rao algorithm on a one-dimensional systolic array is presented in this paper by adopting an extended syndrome matrix. Syndromes of the same order, lying on a slant diagonal in the extended
Publikováno v:
ICPP Workshops
Multi-PE and SIMD architectures are widely utilized to enhance computing power of embedded DSP processors. Design of such architectures may cost vast amount of computing resource. Allocation of computing resources becomes a critical design issue for
Publikováno v:
ISCAS
Recently, many embedded systems adopt the heterogeneous multi-core processors, such as the TI OMAP and the IBM Cell BE, to allow offloading computation-intensive tasks from the MPU to the DSP for satisfying the increasing complexity of the emerging D
Autor:
Shang-Hong Lai, Po-Chun Huang, Meng-Ting Wang, Roger Jyh-Shing Jang, Jenq Kuen Lee, Chun-Fa Chang, Steve Liao, Tei-Wei Kuo, Chih-Wei Liu
Publikováno v:
WESE
Technologies for handheld devices with open-platforms have made rapid progresses recently which gives rise to the necessities of bringing embedded system education and training material up to date. Android system plays a leading role among all of the
Publikováno v:
SiPS
Object detection is an important function for intelligent multimedia processing, but its computational complexity prevented its pervasive uses in consumer electronics. Cost-effective & energy-efficient computations are now available with various inno