Zobrazeno 1 - 10
of 13
pro vyhledávání: '"Chih-Wei Liu"'
Autor:
Chih-Wei Liu, Le-Ren Chang-Chien
Publikováno v:
IET Power Electronics. 9:2453-2460
Adaptive voltage positioning (AVP) scheme is widely adopted in the high-load voltage regulation modules (VRMs) because it helps VRMs reducing almost half the number of output capacitors for the same design without using AVP. The AVP scheme is claimed
Publikováno v:
Integration. 48:230-238
The main contribution of this study is the development of an area-/energy-efficient cascaded direct-truncation (DT) datapath with the so-called static floating-point (SFP) arithmetic to realize a low-delay analysis filter bank (AFB) for digital heari
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 60:638-649
The ANSI S1.11 1/3-octave filter bank is suitable for digital hearing aids, but its large group delay and high computational complexity complicate matters considerably. This study presents a 10-ms 18-band quasi-ANSI S1.11 1/3-octave filter bank for p
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 57:1684-1696
Due to well matching the frequency characteristics of human ears, ANSI S1.11 1/3-octave filter bank is popular in acoustic applications, such as acoustic analyzers and equalizers. It is also desirable in hearing aids because the famous hearing aid pr
Publikováno v:
ISCAS
This paper presents a low-power hearing aid chip which operates under near-threshold voltage region to minimize energy consumption. The proposed variable-latency design technique compensates the performance degradation under ultra-low voltage, while
Publikováno v:
VLSI-DAT
The ANSI S1.11 1/3-octave filter bank is popular in many acoustic applications because it matches the human hearing characteristics. However, the long group delay and the high computational complexity limit the usage in hearing aids. A Quasi-ANSI S1.
Publikováno v:
ASP-DAC
Auditory compensation consumes significant power due to the computation-intensive operations in the filter bank. To reduce the complexity, a controllable filter was designed to replace the filter bank. Filter order was designed to match prescriptions
Autor:
Yi FanJiang, Cheng-Chun Tsai, Shyh-Jye Jou, Yu-Ting Kuo, Jihi-Yu Lin, Tian-Sheuan Chang, Chih-Wei Liu, Ming-Hsien Tu, Cheng-Wen Wei, Kuo-Chiang Chang
Publikováno v:
2010 IEEE Asian Solid-State Circuits Conference.
This paper presents a digital hearing aid chip designed for Mandarin user to enhance speech quality and intelligibility. The hearing aid consists of an 18 subbands analysis and synthesis filter bank, insertion gain stage, and three channels wide dyna
Autor:
Shang-Hong Lai, Po-Chun Huang, Meng-Ting Wang, Roger Jyh-Shing Jang, Jenq Kuen Lee, Chun-Fa Chang, Steve Liao, Tei-Wei Kuo, Chih-Wei Liu
Publikováno v:
WESE
Technologies for handheld devices with open-platforms have made rapid progresses recently which gives rise to the necessities of bringing embedded system education and training material up to date. Android system plays a leading role among all of the
Publikováno v:
ISCAS
This paper describes a complexity-effective design of auditory compensation, which is the most important building block in digital hearing aids. A multi-rate architecture and the filter bank design thereof are proposed to significantly reduce the dat