Zobrazeno 1 - 10
of 15
pro vyhledávání: '"Chih-Wei Liu"'
Publikováno v:
APCCAS
The evolution of wireless communication protocols drives the quest of power-efficient and flexible computing for embedded DSPs, but popular architectures, very-long-instruction-word (VLIW) and application-specific instruction set processor (ASIP), se
Publikováno v:
Journal of VLSI signal processing systems for signal, image and video technology. 42:127-138
A multimedia system-on-a-chip (SoC) usually contains one or more programmable digital signal processors (DSP) to accelerate data-intensive computations. But most of these DSP cores are designed originally for standalone applications, and they must ha
Publikováno v:
ISCAS
Recently, many embedded systems adopt the heterogeneous multi-core processors, such as the TI OMAP and the IBM Cell BE, to allow offloading computation-intensive tasks from the MPU to the DSP for satisfying the increasing complexity of the emerging D
Publikováno v:
ISCAS
This paper presents a power-efficient computing platform for hearing aids. The proposed platform composes four heterogeneous processing elements. Each processing element includes one tiny RISC processor and several power-efficient hardwired accelerat
Autor:
Shang-Hong Lai, Po-Chun Huang, Meng-Ting Wang, Roger Jyh-Shing Jang, Jenq Kuen Lee, Chun-Fa Chang, Steve Liao, Tei-Wei Kuo, Chih-Wei Liu
Publikováno v:
WESE
Technologies for handheld devices with open-platforms have made rapid progresses recently which gives rise to the necessities of bringing embedded system education and training material up to date. Android system plays a leading role among all of the
Autor:
Yu-Ting Kuo, Chih-Wei Liu, Yuan-Hua Chu, Chou-Kun Lin, Pi-Cheng Hsiao, Shu-Chang Kuo, Tay-Jyi Lin, Chi-Hung Lin
Publikováno v:
ACM Great Lakes Symposium on VLSI
This paper presents an event-driven adaptive voltage scaling (AVS) system, where a vanguard collaborates with a rearguard to find a minimal supply voltage. While the vanguard is responsible for the slack cycle time estimation, the rearguard allows vo
Publikováno v:
SiPS
Object detection is an important function for intelligent multimedia processing, but its computational complexity prevented its pervasive uses in consumer electronics. Cost-effective & energy-efficient computations are now available with various inno
Publikováno v:
ISCAS
A scalar (single-issue) processor executes one instruction at a time and its functional units (ALU, multiplier, and shifter, etc) are never concurrently exercised. Modern processors issue multiple instructions simultaneously (i.e. superscalar or VLIW
Autor:
Chih-Wei Liu, Ming-Hung Chang, Tay-Jyi Lin, Siang-Sen Deng, Wei Hwang, Hao-I Yang, Shih-Hao Ou
Publikováno v:
2007 IEEE International Workshop on Memory Technology, Design and Testing.
In this paper, a low-power embedded memory module is designed for a multi-threaded DSP processor. A co-design of circuit and architecture technique is proposed. The technique includes three circuit schemes: controllable pre-charged bit-line, low volt
Publikováno v:
ISCAS
FPGA prototyping is preferred over software simulations for its more convincing & realistic behaviours and fast simulation time. However, it is usually possible after the RTL design is done, which prevents extensive design space exploration. This pap