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of 19
pro vyhledávání: '"Tadahiro Ohmi"'
Publikováno v:
International Journal of Computer and Electrical Engineering. :554-557
Publikováno v:
Analog Integrated Circuits and Signal Processing. 21:173-191
Circuit architecture for parallel data processing directly carried out on the hardware have been developed based on a high-functionality transistor, neuron MOSFET (neuMOS or νMOS for short). In the νMOS data sorting circuit, multiple analog input d
Publikováno v:
Computers & Electrical Engineering. 23:415-429
Neuron MOS transistor (neuMOS or νMOS) mimicking the fundamental behavior of neurons at a primitive device level allows the implementation of intelligent functions directly on the integrated circuit hardware. Based on the νMOS technology a real-tim
Autor:
Tadahiro Ohmi, Tadashi Shibata
Publikováno v:
Journal of Robotics and Mechatronics. 8:508-515
The primary objective of this article is not to present integrated circuit implementation of neural networks in the sense that neurophysiological models are constructed in electronic circuits, but to describe new-architecture intelligent electronic c
Publikováno v:
IEEE Transactions on Electron Devices. 42(1):135-143
A new synapse memory cell employing floating-gate EEPROM technology has been developed which is characterized by an excellent weight-updating linearity under the constant-pulse programming. Such a feature has been realized for the first time by emplo
Autor:
Tadahiro Ohmi, Tadashi Shibata
Publikováno v:
IEEE Transactions on Electron Devices. 40:570-576
Described are the fundamental design principles for binary-logic circuits using a highly functional device called the neuron MOS transistor ( nu MOS), a single MOS transistor simulating the function of biological neurons. To facilitate logic design e
Publikováno v:
FPT
An FPGA prototyping of real-time pattern generator for step-and-scan lithography equipment using digital micromirror device (DMD) is described. It supports 1 M sample/sec stage position data acquisition for high-speed and high-accuracy pattern genera
Publikováno v:
ISCAS (4)
A non-volatile high-precision zone-programmed EEPROM comprising two transistors per cell is proposed. The newly developed memory employs channel hot electron injection and real-time write monitoring during cell programming to achieve automatic write
Publikováno v:
1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.
A minimum-distance-vector fully-parallel-search hardware has been developed based on neuron-MOS (/spl nu/MOS) technology for use in real-time event recognition system. The distance calculation as well as the minimum distance search are conducted base
Publikováno v:
Proceedings of Fifth International Conference on Microelectronics for Neural Networks.
Neuron MOS transistor (/spl upsi/MOS) mimicking the fundamental behavior of neurons at a very primitive device level has been applied to construct a real-time event recognition hardware. A neuron MOS associator searches for the most similar event in