Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Jose Barreiro"'
Autor:
Prawal Man Shrestha, Hajime Shibata, Yunzhi Dong, Jose Barreiro Silva, Trevor Clifford Caldwell, Jialin Zhao, Zhao Li, Jeffrey Gealow, Wenhua Yang
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 65:859-863
This brief presents a power and area efficient way to measure the feedback DAC static mismatch error in a multi-bit continuous-time delta-sigma modulator. By sequentially forcing each DAC element output in the designed scheme, the mismatch errors amo
Autor:
Wenhua William Yang, Hajime Shibata, Jose Barreiro Silva, Trevor Clifford Caldwell, Yunzhi Dong, Richard Schreier, Jialin Zhao, Qingdong Meng, Jeffrey Gealow, Zhao Li, Donald Paterson
Publikováno v:
IEEE Journal of Solid-State Circuits. 51:2917-2927
This paper presents a continuous-time (CT) multi-stage noise-shaping (MASH) ADC in 28 nm CMOS. The MASH ADC uses a first-order front-end stage to digitize the input signal and a second-order back-end stage to digitize the quantization noise of the co
Autor:
Nevena Rakuljic, Todd Weigandt, Corey Petersen, Eric Otte, Daniel Rey-Losada, Donald Paterson, Frank Murden, Tao Pan, Jose Barreiro Silva, Jeff Bray, Steve Kosic, Phil Brown, Lawrence A. Singer, Jeffrey Gealow, Janet Brunsilius, Qicheng Yu, Siddharth Devarajan, Daniel F. Kelly, Carroll C. Speir
Publikováno v:
ISSCC
Software defined radios and wideband instrumentation demand the ability to digitize wide BW RF signals with moderately high dynamic range. A 12b 10GS/s ADC with an input analog bandwidth of 7.4GHz is developed for such applications in 28nm CMOS. The
Autor:
Hajime Shibata, Jeffrey Gealow, Jose Barreiro Silva, Qingdong Meng, Trevor Clifford Caldwell, Wenhua Yang, Donald Paterson, Jialin Zhao, Yunzhi Dong, Richard Schreier
Publikováno v:
ISSCC
The width of RF bands commonly used for cellular telecommunications has grown from 35-to-75MHz for 2G/3G/4G platforms to 100-to-200MHz for today's LTE, and the desire for relaxed image-rejection filtering has pushed the direct IF sampling frequencies
Autor:
Jose Barreiro Silva, Gabor C. Temes, Philippe Deval, János Márkus, Vincent Quiquempoix, Alexandre Barreto, Gabriele Bellini
Publikováno v:
IEEE Journal of Solid-State Circuits. 41:1562-1571
This paper describes a low-power 22-bit incremental ADC, including an on-chip digital filter and a low-noise/low-drift oscillator, realized in a 0.6-mum CMOS process. It incorporates a novel offset-cancellation scheme based on fractal sequences, a no
Publikováno v:
CICC
In this paper the theoretical operation of incremental (charge-balancing) delta-sigma (DeltaSigma) converters is reviewed, and the implementation of a 22-bit incremental A/D converter is described. Two different analyses of the first-order incrementa