Zobrazeno 1 - 10
of 27
pro vyhledávání: '"Tadahiro Ohmi"'
Autor:
Akinobu Teramoto, Shigetoshi Sugawa, Hyeonwoo Park, T. Inatsuka, Tadahiro Ohmi, Rihito Kuroda
Publikováno v:
Microelectronic Engineering. 109:298-301
Graphical abstractDisplay Omitted SILC caused by hot-hole injection depends only on the number of injected holes.SILC is independent of the filed, and carrier density and energy at the stress.SILC increases exponentially at an early stress and linear
Publikováno v:
Microelectronic Engineering. 88:3133-3139
The flattening speed of the low temperature atomically flattening technology is evaluated in order to apply atomically flat surface of (100) orientation on large-diameter silicon wafers to the LSI manufacturing. The atomically flatness of the whole s
Publikováno v:
Solid-State Electronics. 54:420-426
The paper deals with the investigation of the hole mobility in p-channel MOS transistors fabricated on (1 1 0) oriented silicon wafers. At first, we showed that the conventional methods used to extract the conduction parameters such as the low field
Autor:
Toyohiko Kinoshita, Atsushi Ogura, Tadahiro Ohmi, Takeo Hattori, Tomoyuki Suwa, Kohki Nagata, Shigetoshi Sugawa, Takayuki Muro, Hiroshi Nohira, Akinobu Teramoto
Publikováno v:
Microelectronic Engineering. 109:197-199
Transition layer formed between SiO2 and Si substrate were clarified by XPS.Compositional transition layer (CTL) consists of the 1st CTL and the 2nd CTL.The β-Si is closely correlated with the oxidation-induced residual stress. The angle-resolved Si
Publikováno v:
Microelectronics Reliability. 48:1649-1654
Negative bias temperature instability (NBTI) lifetime prediction of thin gate insulator films based on hole injection without gate voltage acceleration is described and lifetime comparison between SiO 2 film and SiON film is made based on the predict
Publikováno v:
Microelectronic Engineering. 84:2105-2108
In this paper, the electrical characteristics of multi-gate MOSFETs (MUGFETs) using the advanced radical gate oxide and a suppression of Negative bias temperature degradation in accumulation mode FD-SOI MOSFETs are described. Firstly, we experimental
Autor:
Michihiko Mifuji, Kazufumi Watanabe, Tadahiro Ohmi, Shigetoshi Sugawa, Rihito Kuroda, Takahisa Yamaha, Akinobu Teramoto
Publikováno v:
Microelectronics Reliability. 47:930-936
A circuit level methodology for predicting performance degradations due to negative bias temperature stress is developed in this paper. Degradation mechanism is discussed based on experimental observations. Then, models that consist of a threshold vo
Publikováno v:
Microelectronics Reliability. 47:786-789
High quality gate insulator film formation on 4H-SiC substrate is demonstrated. The insulator films were formed by the PECVD and radical oxynitridation using microwave-excited high-density plasma with NO gas at low temperature. The oxide fixed charge
Publikováno v:
Microelectronics Reliability. 47:409-418
An evaluation method using the modified hole injection method is proposed to evaluate Negative Bias Temperature Instability (NBTI) in this paper. The physical backgrounds of the evaluation method are strictly discussed. The proposed method accelerate
Publikováno v:
Microelectronics Journal. 37:44-49
The high-quality PECVD silicon nitride has been deposited by high-density and low-ion-energy plasma at 400 °C and the effect of the process parameters, such as silane and nitrogen flow rate, pressure, on its structure and electrical properties has b