Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Chen Liang"'
Publikováno v:
Journal of Semiconductors. 35:015002
A new broadband low-noise amplifier (LNA) is proposed. The conventional common gate (CG) LNA exhibits a relatively high noise figure, so active gm-boosting technology is utilized to restrain the noise generated by the input transistors and reduce the
Publikováno v:
Journal of Semiconductors. 35:015005
This paper presents the design of an ultralow power receiver front-end designed for a wireless sensor network (WSN) in a 0.18 μm CMOS process. The author designs two front-ends working in the saturation region and the subthreshold region respectivel
Autor:
Chen Liang, Li Zhiqun
Publikováno v:
Journal of Semiconductors. 33:105009
This paper presents a low noise amplifier (LNA), which could work at an ultra-low voltage of 0.5 V and was optimized for WSN application using 0.13 μm RF-CMOS technology. The circuit was analyzed and a new optimization method for a folded cascode LN
Autor:
Yu Fang, Wang Jian, Li Ming, Zhao Kai, Zhao Yan, Wu Lihua, Zhang Qianli, Stanley L. Chen, Gao Jiantou, Li Jianzhong, Zhang Guoquan, Yang Bo, Chen Liang, Han Xiaowei, Zhang Feng, Guo Xufeng, Li Yan, Liu Guizhai, Liu Zhongli
Publikováno v:
Journal of Semiconductors. 33:015010
We present an input/output block (IOB) array used in the radiation-hardened SRAM-based field- programmable gate array (FPGA) VS1000, which is designed and fabricated with a 0.5 m partially depleted silicon-on-insulator (SOI) logic process at the CETC
Publikováno v:
Journal of Semiconductors. 32:105004
A new optimization method of a source inductive degenerated low noise amplifier (LNA) with electrostatic discharge protection is proposed. It can achieve power-constrained simultaneous noise and input matching. An analysis of the input impedance and
Autor:
Yu Fang, Zhang Feng, Zhao Yan, Wang Jian, Yang Bo, Guo Xufeng, Li Yan, Li Ming, Gao Jiantou, Zhang Guoquan, Zhao Kai, Han Xiaowei, Wu Lihua, Li Jianzhong, Chen Liang, Zhang Qianli, Liu Zhongli, Stanley L. Chen, Liu Guizhai
Publikováno v:
Journal of Semiconductors. 32:075012
A radiation-hardened SRAM-based field programmable gate array VS1000 is designed and fabricated with a 0.5 m partial-depletion silicon-on-insulator logic process at the CETC 58th Institute. The new logic cell (LC), with a multi-mode based on 3-input
Autor:
Xie Hong-Yun, Wang Ren-Qing, Zhang Wan-rong, Shen Pei, You Yunxia, Chen Liang, Sun Bo-Tao, Xiao Ying
Publikováno v:
Journal of Semiconductors. 31:064006
A novel cascaded DFB laser, which consists of two serial gratings to provide selectable wavelengths, is presented and analyzed by the transfer matrix method. In this method, efficient facet reflectivity is derived from the transfer matrix built for e